Searched +full:mmc +full:- +full:ddr +full:- +full:1 +full:_8v (Results 1 – 25 of 234) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 11 - Piotr Sroka <piotrs@cadence.com> 14 - $ref: mmc-controller.yaml 19 - enum: 20 - socionext,uniphier-sd4hc 21 - const: cdns,sd4hc [all …]
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| D | brcm,sdhci-brcmstb.txt | 3 This file documents differences between the core properties in mmc.txt 4 and the properties used by the sdhci-brcmstb driver. 11 - compatible: should be one of the following 12 - "brcm,bcm7425-sdhci" 13 - "brcm,bcm7445-sdhci" 14 - "brcm,bcm7216-sdhci" 16 Refer to clocks/clock-bindings.txt for generic clock consumer properties. 21 sd-uhs-sdr50; 22 sd-uhs-ddr50; 23 sd-uhs-sdr104; [all …]
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| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller Generic Binding 10 - Ulf Hansson <ulf.hansson@linaro.org> 13 These properties are common to multiple MMC host controllers. Any host 17 It is possible to assign a fixed index mmcN to an MMC host controller 23 pattern: "^mmc(@.*)?$" 25 "#address-cells": [all …]
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| D | hi3798cv200-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details 7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents 9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200 13 - compatible: Should contain "hisilicon,hi3798cv200-dw-mshc". 14 - clocks: A list of phandle + clock-specifier pairs for the clocks listed 15 in clock-names. 16 - clock-names: Should contain the following: 17 "ciu" - The ciu clock described in synopsys-dw-mshc.txt. 18 "biu" - The biu clock described in synopsys-dw-mshc.txt. 19 "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | cdns,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 15 - enum: 16 - amd,pensando-elba-sd4hc 17 - microchip,mpfs-sd4hc 18 - socionext,uniphier-sd4hc 19 - const: cdns,sd4hc [all …]
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| D | mmc-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MMC Controller Common Properties 10 - Ulf Hansson <ulf.hansson@linaro.org> 13 These properties are common to multiple MMC host controllers. Any host 17 It is possible to assign a fixed index mmcN to an MMC host controller 23 pattern: "^mmc(@.*)?$" 25 "#address-cells": [all …]
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| D | brcm,sdhci-brcmstb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Al Cooper <alcooperx@gmail.com> 11 - Florian Fainelli <f.fainelli@gmail.com> 16 - items: 17 - enum: 18 - brcm,bcm7216-sdhci 19 - const: brcm,bcm7445-sdhci [all …]
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| D | hi3798cv200-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details 7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents 9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200 13 - compatible: Should contain "hisilicon,hi3798cv200-dw-mshc". 14 - clocks: A list of phandle + clock-specifier pairs for the clocks listed 15 in clock-names. 16 - clock-names: Should contain the following: 17 "ciu" - The ciu clock described in synopsys-dw-mshc.txt. 18 "biu" - The biu clock described in synopsys-dw-mshc.txt. 19 "ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling. [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5260-xyref5260.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 27 stdout-path = "serial2:115200n8"; 31 compatible = "fixed-clock"; 32 clock-frequency = <24000000>; 33 clock-output-names = "fin_pll"; 34 #clock-cells = <0>; 37 ioclk_pcm: clock-pcm-ext { 38 compatible = "fixed-clock"; 39 clock-frequency = <2048000>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | rk3288-tinker-s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "rk3288-tinker.dtsi" 12 compatible = "asus,rk3288-tinker-s", "rockchip,rk3288"; 16 bus-width = <8>; 17 cap-mmc-highspeed; 18 non-removable; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; 21 max-frequency = <150000000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rk3288-tinker-s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "rk3288-tinker.dtsi" 12 compatible = "asus,rk3288-tinker-s", "rockchip,rk3288"; 16 bus-width = <8>; 17 cap-mmc-highspeed; 18 non-removable; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>; 21 max-frequency = <150000000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/ |
| D | rk3328-nanopi-r2c-plus.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 10 #include "rk3328-nanopi-r2c.dts" 14 compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328"; 22 bus-width = <8>; 23 cap-mmc-highspeed; 24 max-frequency = <150000000>; 25 mmc-ddr-1_8v; 26 mmc-hs200-1_8v; 27 non-removable; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-3720-espressobin-emmc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * Romain Perier <romain.perier@free-electrons.com> 11 …* Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schemati… 14 /dts-v1/; 16 #include "armada-3720-espressobin.dtsi" 20 compatible = "globalscale,espressobin-emmc", "globalscale,espressobin", 26 non-removable; 27 bus-width = <8>; 28 mmc-ddr-1_8v; 29 mmc-hs400-1_8v; [all …]
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| D | armada-3720-espressobin-v7-emmc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * Romain Perier <romain.perier@free-electrons.com> 11 * Schematic available at http://wiki.espressobin.net/tiki-download_file.php?fileId=200 14 /dts-v1/; 16 #include "armada-3720-espressobin.dtsi" 20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7", 33 switch0port1: port@1 { 34 reg = <1>; 36 phy-handle = <&switch0phy0>; 42 phy-handle = <&switch0phy2>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | ipq9574-rdp418.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 9 /dts-v1/; 14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2"; 15 compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574"; 22 stdout-path = "serial0:115200n8"; 27 pinctrl-0 = <&spi_0_pins>; 28 pinctrl-names = "default"; 32 compatible = "micron,n25q128a11", "jedec,spi-nor"; [all …]
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| D | ipq5018-rdp432-c2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause 3 * IPQ5018 MP03.1-C2 board device tree source 8 /dts-v1/; 13 model = "Qualcomm Technologies, Inc. IPQ5018/AP-RDP432.1-C2"; 14 compatible = "qcom,ipq5018-rdp432-c2", "qcom,ipq5018"; 21 stdout-path = "serial0:115200n8"; 26 pinctrl-0 = <&uart1_pins>; 27 pinctrl-names = "default"; 32 pinctrl-0 = <&sdc_default_state>; 33 pinctrl-names = "default"; [all …]
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| D | ipq5332-rdp441.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * IPQ5332 AP-MI01.2 board device tree source 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332"; 18 clock-frequency = <400000>; 19 pinctrl-0 = <&i2c_1_pins>; 20 pinctrl-names = "default"; 25 bus-width = <4>; [all …]
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| D | ipq5332-rdp474.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.9", "qcom,ipq5332"; 18 clock-frequency = <400000>; 19 pinctrl-0 = <&i2c_1_pins>; 20 pinctrl-names = "default"; 25 bus-width = <4>; 26 max-frequency = <192000000>; [all …]
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| D | ipq9574-rdp433.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 9 /dts-v1/; 14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; 15 compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; 22 stdout-path = "serial0:115200n8"; 26 compatible = "regulator-fixed"; 27 regulator-min-microvolt = <3300000>; 28 regulator-max-microvolt = <3300000>; 29 regulator-boot-on; [all …]
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| D | ipq5332-rdp468.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332"; 18 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; 19 pinctrl-names = "default"; 23 compatible = "micron,n25q128a11", "jedec,spi-nor"; 25 #address-cells = <1>; 26 #size-cells = <1>; [all …]
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| D | ipq5332-rdp442.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 8 /dts-v1/; 10 #include "ipq5332-rdp-common.dtsi" 14 compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332"; 18 clock-frequency = <400000>; 19 pinctrl-0 = <&i2c_1_pins>; 20 pinctrl-names = "default"; 25 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>; 26 pinctrl-names = "default"; 30 compatible = "micron,n25q128a11", "jedec,spi-nor"; [all …]
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/microchip/ |
| D | mpfs-polarberry.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2022 Microchip Technology Inc */ 4 /dts-v1/; 7 #include "mpfs-polarberry-fabric.dtsi" 22 stdout-path = "serial0:115200n8"; 26 timebase-frequency = <MTIMER_FREQ>; 45 phy-mode = "sgmii"; 46 phy-handle = <&phy0>; 51 phy-mode = "sgmii"; 52 phy-handle = <&phy1>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynos7885-jackpotlte.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 chassis-type = "handset"; 28 stdout-path = &serial_2; 38 gpio-keys { 39 compatible = "gpio-keys"; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-hwacom-amazetv.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxl-s905x.dtsi" 13 compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl"; 22 stdout-path = "serial0:115200n8"; 30 vddio_card: gpio-regulator { 31 compatible = "regulator-gpio"; 33 regulator-name = "VDDIO_CARD"; 34 regulator-min-microvolt = <1800000>; 35 regulator-max-microvolt = <3300000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxl-s905x-hwacom-amazetv.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxl-s905x.dtsi" 13 compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl"; 22 stdout-path = "serial0:115200n8"; 30 vddio_card: gpio-regulator { 31 compatible = "regulator-gpio"; 33 regulator-name = "VDDIO_CARD"; 34 regulator-min-microvolt = <1800000>; 35 regulator-max-microvolt = <3300000>; [all …]
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