| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | marvell,mmp2-audio-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-audio-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell MMP2 Audio Clock Controller 10 - Lubomir Rintel <lkundrak@v3.sk> 13 The audio clock controller generates and supplies the clocks to the audio 16 Each clock is assigned an identifier and client nodes use this identifier 17 to specify the clock which they consume. 20 <dt-bindings/clock/marvell,mmp2-audio.h>. [all …]
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| D | marvell,mmp2-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell MMP2 and MMP3 Clock Controller 10 - Lubomir Rintel <lkundrak@v3.sk> 13 The clock subsystem on MMP2 or MMP3 generates and supplies clock to various 16 Each clock is assigned an identifier and client nodes use this identifier 17 to specify the clock which they consume. 19 All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | marvell,mmp2-audio-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-audio-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell MMP2 Audio Clock Controller 10 - Lubomir Rintel <lkundrak@v3.sk> 13 The audio clock controller generates and supplies the clocks to the audio 16 Each clock is assigned an identifier and client nodes use this identifier 17 to specify the clock which they consume. 20 <dt-bindings/clock/marvell,mmp2-audio.h>. [all …]
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| D | marvell,mmp2-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell MMP2 and MMP3 Clock Controller 10 - Lubomir Rintel <lkundrak@v3.sk> 13 The clock subsystem on MMP2 or MMP3 generates and supplies clock to various 16 Each clock is assigned an identifier and client nodes use this identifier 17 to specify the clock which they consume. 19 All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>. [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | mmp2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/marvell,mmp2.h> 8 #include <dt-bindings/power/marvell,mmp2.h> 9 #include <dt-bindings/clock/marvell,mmp2-audio.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "simple-bus"; 28 interrupt-parent = <&intc>; [all …]
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| D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/marvell,mmp2.h> 7 #include <dt-bindings/power/marvell,mmp2.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 enable-method = "marvell,mmp3-smp"; 22 next-level-cache = <&l2>; [all …]
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| D | mmp2-olpc-xo-1-75.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 8 /dts-v1/; 9 #include "mmp2.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/linux-event-codes.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/clock/marvell,mmp2-audio.h> 16 model = "OLPC XO-1.75"; 17 compatible = "olpc,xo-1.75", "mrvl,mmp2"; 20 #address-cells = <1>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | mmp2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/marvell,mmp2.h> 8 #include <dt-bindings/power/marvell,mmp2.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 24 #address-cells = <1>; 25 #size-cells = <1>; 26 compatible = "simple-bus"; 27 interrupt-parent = <&intc>; 30 L2: l2-cache { [all …]
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| D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/marvell,mmp2.h> 7 #include <dt-bindings/power/marvell,mmp2.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 enable-method = "marvell,mmp3-smp"; 22 next-level-cache = <&l2>; [all …]
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| D | mmp2-olpc-xo-1-75.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 8 /dts-v1/; 9 #include "mmp2.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/linux-event-codes.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 15 model = "OLPC XO-1.75"; 16 compatible = "olpc,xo-1.75", "mrvl,mmp2"; 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | marvell,mmp2-ccic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Marvell MMP2 camera host interface 11 - Lubomir Rintel <lkundrak@v3.sk> 15 pattern: '^camera@[a-f0-9]+$' 18 const: marvell,mmp2-ccic 26 power-domains: 30 $ref: /schemas/graph.yaml#/$defs/port-base [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | marvell,mmp2-ccic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Marvell MMP2 camera host interface bindings 11 - Lubomir Rintel <lkundrak@v3.sk> 15 pattern: '^camera@[a-f0-9]+$' 18 const: marvell,mmp2-ccic 36 # Documentation/devicetree/bindings/media/video-interfaces.txt 38 remote-endpoint: true [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | marvell,mmp2-ssp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 14 - $ref: spi-controller.yaml# 18 const: marvell,mmp2-ssp 29 ready-gpios: 36 - compatible 37 - reg [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | marvell,mmp2-ssp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 14 - $ref: spi-controller.yaml# 18 const: marvell,mmp2-ssp 29 ready-gpios: 36 - compatible 37 - reg [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-mmp/ |
| D | mmp2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-mmp/mmp2.c 5 * code name MMP2 18 #include <asm/hardware/cache-tauros2.h> 21 #include "addr-map.h" 22 #include "regs-apbc.h" 27 #include "mmp2.h" 28 #include "pm-mmp2.h" 128 * enable bus/functional clock, enable 6.5MHz (divider 4), in mmp2_timer_init() 137 /* on-chip devices */ [all …]
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| D | pm-mmp2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * MMP2 Power Management Routines 18 #include <asm/mach-types.h> 21 #include "addr-map.h" 22 #include "pm-mmp2.h" 23 #include "regs-icu.h" 29 int irq = d->irq; in mmp2_set_wake() 63 /* close AXI fabric clock gate */ in pm_scu_clk_disable() 67 /* close MCB master clock gate */ in pm_scu_clk_disable() 79 /* open AXI fabric clock gate */ in pm_scu_clk_enable() [all …]
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 6 The <linux/clk.h> calls support software clock gating and 20 Select this option when the clock API in <linux/clk.h> is implemented 26 bool "Common Clock Framework" 33 The common clock framework is a single definition of struct 35 implementation of the clock API in include/linux/clk.h. 42 tristate "Clock driver for WM831x/2x PMICs" 59 tristate "Clock driver for Maxim 77620/77686/77802 MFD" 63 clock. 66 tristate "Maxim 9485 Programmable Clock Generator" [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | mrvl-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 12 - Rob Herring <robh+dt@kernel.org> 15 - if: 20 - intel,pxa25x-gpio 21 - intel,pxa26x-gpio [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | mrvl-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpio/mrvl-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Bartosz Golaszewski <bgolaszewski@baylibre.com> 12 - Rob Herring <robh+dt@kernel.org> 15 - if: 20 - intel,pxa25x-gpio 21 - intel,pxa26x-gpio [all …]
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| /kernel/linux/linux-5.10/drivers/clk/mmp/ |
| D | clk-audio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * MMP Audio Clock Controller driver 8 #include <linux/clk-provider.h> 15 #include <dt-bindings/clock/marvell,mmp2-audio.h> 123 aud_pll_ctrl0 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL0); in audio_pll_recalc_rate() 131 aud_pll_ctrl1 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL1); in audio_pll_recalc_rate() 214 writel(val, priv->mmio_base + SSPA_AUD_PLL_CTRL0); in audio_pll_set_rate() 218 writel(val, priv->mmio_base + SSPA_AUD_PLL_CTRL1); in audio_pll_set_rate() 224 return -ERANGE; in audio_pll_set_rate() 236 { .hw = &priv->audio_pll_hw }, in register_clocks() [all …]
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| /kernel/linux/linux-6.6/drivers/clk/mmp/ |
| D | clk-audio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * MMP Audio Clock Controller driver 8 #include <linux/clk-provider.h> 15 #include <dt-bindings/clock/marvell,mmp2-audio.h> 125 aud_pll_ctrl0 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL0); in audio_pll_recalc_rate() 133 aud_pll_ctrl1 = readl(priv->mmio_base + SSPA_AUD_PLL_CTRL1); in audio_pll_recalc_rate() 216 writel(val, priv->mmio_base + SSPA_AUD_PLL_CTRL0); in audio_pll_set_rate() 220 writel(val, priv->mmio_base + SSPA_AUD_PLL_CTRL1); in audio_pll_set_rate() 226 return -ERANGE; in audio_pll_set_rate() 238 { .hw = &priv->audio_pll_hw }, in register_clocks() [all …]
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 6 The <linux/clk.h> calls support software clock gating and 16 Select this option when the clock API in <linux/clk.h> is implemented 22 bool "Common Clock Framework" 28 The common clock framework is a single definition of struct 30 implementation of the clock API in include/linux/clk.h. 37 tristate "Clock driver for WM831x/2x PMICs" 54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner" 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 62 tristate "Clock driver for Apple SoC NCOs" [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | marvell,pxau2o-ehci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 14 - $ref: usb-hcd.yaml# 18 const: marvell,pxau2o-ehci 29 clock-names: 35 phy-names: 39 - compatible [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | marvell,pxau2o-ehci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Lubomir Rintel <lkundrak@v3.sk> 14 - $ref: usb-hcd.yaml# 18 const: marvell,pxau2o-ehci 29 clock-names: 35 phy-names: 39 - compatible [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | marvell,mmp-sspa.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/marvell,mmp-sspa.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lubomir Rintel <lkundrak@v3.sk> 13 - $ref: dai-common.yaml# 17 pattern: "^audio-controller(@.*)?$" 20 const: marvell,mmp-sspa 24 - description: RX block 25 - description: TX block [all …]
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