Home
last modified time | relevance | path

Searched full:mscc (Results 1 – 25 of 137) sorted by relevance

123456

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mips/
Dmscc.txt7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
41 compatible = "mscc,ocelot-cpu-syscon", "syscon";
52 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dmscc,ocelot.yaml4 $id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#
25 - mscc,vsc7512
42 $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml
50 - mscc,ocelot-sgpio
54 $ref: /schemas/net/mscc,miim.yaml
58 - mscc,ocelot-miim
62 $ref: /schemas/net/mscc,vsc7514-switch.yaml
67 - mscc,vsc7512-switch
90 compatible = "mscc,vsc7512";
97 compatible = "mscc,ocelot-miim";
[all …]
/kernel/linux/linux-6.6/drivers/net/phy/mscc/
DMakefile3 # Makefile for MSCC networking PHY driver
5 obj-$(CONFIG_MICROSEMI_PHY) := mscc.o
6 mscc-objs := mscc_main.o
7 mscc-objs += mscc_serdes.o
10 mscc-objs += mscc_macsec.o
14 mscc-objs += mscc_ptp.o
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/
Dmscc.txt7 - compatible: "mscc,ocelot"
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
41 compatible = "mscc,ocelot-cpu-syscon", "syscon";
52 - compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
57 compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
/kernel/linux/linux-5.10/drivers/net/phy/mscc/
DMakefile3 # Makefile for MSCC networking PHY driver
5 obj-$(CONFIG_MICROSEMI_PHY) := mscc.o
6 mscc-objs := mscc_main.o
9 mscc-objs += mscc_macsec.o
13 mscc-objs += mscc_ptp.o
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dmscc,ocelot-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#
18 - mscc,jaguar2-pinctrl
19 - mscc,luton-pinctrl
20 - mscc,ocelot-pinctrl
21 - mscc,serval-pinctrl
22 - mscc,servalt-pinctrl
99 compatible = "mscc,ocelot-pinctrl";
/kernel/linux/linux-5.10/arch/mips/boot/dts/mscc/
Docelot.dtsi7 compatible = "mscc,ocelot";
55 compatible = "mscc,ocelot-cpu-syscon", "syscon";
60 compatible = "mscc,ocelot-icpu-intr";
82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
108 compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
119 compatible = "mscc,vsc7514-switch";
188 compatible = "mscc,ocelot-chip-reset";
193 compatible = "mscc,ocelot-pinctrl";
227 compatible = "mscc,ocelot-miim";
249 compatible = "mscc,ocelot-miim";
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/mscc/
Docelot.dtsi7 compatible = "mscc,ocelot";
55 compatible = "mscc,ocelot-cpu-syscon", "syscon";
60 compatible = "mscc,ocelot-icpu-intr";
82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
108 compatible = "mscc,ocelot-spi", "snps,dw-apb-ssi";
119 compatible = "mscc,vsc7514-switch";
200 compatible = "mscc,ocelot-chip-reset";
205 compatible = "mscc,ocelot-pinctrl";
239 compatible = "mscc,ocelot-miim";
261 compatible = "mscc,ocelot-miim";
[all …]
Djaguar2.dtsi9 compatible = "mscc,jr2";
59 compatible = "mscc,ocelot-cpu-syscon", "syscon";
64 compatible = "mscc,jaguar2-icpu-intr";
99 compatible = "mscc,jaguar2-pinctrl";
142 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
155 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
Dluton.dtsi7 compatible = "mscc,luton";
55 compatible = "mscc,ocelot-cpu-syscon", "syscon";
60 compatible = "mscc,luton-icpu-intr";
82 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
95 compatible = "mscc,luton-pinctrl";
Dserval.dtsi9 compatible = "mscc,serval";
58 compatible = "mscc,ocelot-cpu-syscon", "syscon";
63 compatible = "mscc,serval-icpu-intr";
98 compatible = "mscc,serval-pinctrl";
141 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dmscc,ocelot-icpu-intr.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#
24 - mscc,jaguar2-icpu-intr
25 - mscc,luton-icpu-intr
26 - mscc,ocelot-icpu-intr
27 - mscc,serval-icpu-intr
56 compatible = "mscc,ocelot-icpu-intr";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/reset/
Docelot-reset.txt6 The reset registers are both present in the MSCC vcoreiii MIPS and
11 - compatible: "mscc,ocelot-chip-reset", "mscc,luton-chip-reset",
12 "mscc,jaguar2-chip-reset" or "microchip,sparx5-chip-reset"
16 compatible = "mscc,ocelot-chip-reset";
/kernel/linux/linux-6.6/drivers/net/ethernet/mscc/
Docelot.h19 #include <soc/mscc/ocelot_qsys.h>
20 #include <soc/mscc/ocelot_sys.h>
21 #include <soc/mscc/ocelot_dev.h>
22 #include <soc/mscc/ocelot_ana.h>
23 #include <soc/mscc/ocelot_ptp.h>
24 #include <soc/mscc/ocelot_vcap.h>
25 #include <soc/mscc/ocelot.h>
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dmscc,vsc7514-serdes.yaml4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
29 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
30 Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
35 - mscc,vsc7514-serdes
54 compatible = "mscc,vsc7514-serdes";
/kernel/linux/linux-5.10/drivers/net/ethernet/mscc/
Docelot.h20 #include <soc/mscc/ocelot_qsys.h>
21 #include <soc/mscc/ocelot_sys.h>
22 #include <soc/mscc/ocelot_dev.h>
23 #include <soc/mscc/ocelot_ana.h>
24 #include <soc/mscc/ocelot_ptp.h>
25 #include <soc/mscc/ocelot.h>
/kernel/linux/linux-5.10/arch/mips/generic/
Dboard-ocelot.its.S5 description = "MSCC Ocelot PCB123 Device Tree";
6 data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb");
16 description = "MSCC Ocelot PCB120 Device Tree";
17 data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb");
/kernel/linux/linux-6.6/arch/mips/generic/
Dboard-jaguar2.its.S5 description = "MSCC Jaguar2 PCB110 Device Tree";
6 data = /incbin/("boot/dts/mscc/jaguar2_pcb110.dtb");
15 description = "MSCC Jaguar2 PCB111 Device Tree";
16 data = /incbin/("boot/dts/mscc/jaguar2_pcb111.dtb");
Dboard-ocelot.its.S5 description = "MSCC Ocelot PCB123 Device Tree";
6 data = /incbin/("boot/dts/mscc/ocelot_pcb123.dtb");
16 description = "MSCC Ocelot PCB120 Device Tree";
17 data = /incbin/("boot/dts/mscc/ocelot_pcb120.dtb");
/kernel/linux/linux-6.6/drivers/power/reset/
Docelot-reset.c101 .syscon = "mscc,ocelot-cpu-syscon",
108 .syscon = "mscc,ocelot-cpu-syscon",
115 .syscon = "mscc,ocelot-cpu-syscon",
130 .compatible = "mscc,jaguar2-chip-reset",
133 .compatible = "mscc,luton-chip-reset",
136 .compatible = "mscc,ocelot-chip-reset",
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dmscc,vsc7514-switch.yaml4 $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml#
25 const: mscc,vsc7514-switch
45 const: mscc,vsc7512-switch
62 - mscc,vsc7512-switch
63 - mscc,vsc7514-switch
141 compatible = "mscc,vsc7514-switch";
189 compatible = "mscc,vsc7512-switch";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dphy-ocelot-serdes.txt19 This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
20 Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
24 - compatible: should be "mscc,vsc7514-serdes"
33 compatible = "mscc,vsc7514-serdes";
/kernel/linux/linux-6.6/drivers/mfd/
Docelot-core.c27 #include <soc/mscc/ocelot.h>
165 .of_compatible = "mscc,ocelot-pinctrl",
170 .of_compatible = "mscc,ocelot-sgpio",
175 .of_compatible = "mscc,ocelot-miim",
182 .of_compatible = "mscc,ocelot-miim",
189 .of_compatible = "mscc,vsc7514-serdes",
194 .of_compatible = "mscc,vsc7512-switch",
/kernel/linux/linux-6.6/drivers/net/mdio/
Dmdio-mscc-miim.c14 #include <linux/mdio/mdio-mscc-miim.h>
81 WARN_ONCE(1, "mscc miim status read error %d\n", ret); in mscc_miim_status()
124 WARN_ONCE(1, "mscc miim write cmd reg error %d\n", ret); in mscc_miim_read()
135 WARN_ONCE(1, "mscc miim read data reg error %d\n", ret); in mscc_miim_read()
168 WARN_ONCE(1, "mscc miim write error %d\n", ret); in mscc_miim_write()
187 WARN_ONCE(1, "mscc reset set error %d\n", ret); in mscc_miim_reset()
193 WARN_ONCE(1, "mscc reset clear error %d\n", ret); in mscc_miim_reset()
362 .compatible = "mscc,ocelot-miim",
376 .name = "mscc-miim",
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/reset/
Docelot-reset.txt6 The reset registers are both present in the MSCC vcoreiii MIPS and
10 - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset"
14 compatible = "mscc,ocelot-chip-reset";

123456