Searched +full:mt8192 +full:- +full:scp_adsp (Results 1 – 6 of 6) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: MediaTek Functional Clock Controller for MT819210 - Chun-Jie Chen <chun-jie.chen@mediatek.com>13 The Mediatek functional clock controller provides various clocks on MT8192.18 - enum:19 - mediatek,mt8192-scp_adsp20 - mediatek,mt8192-imp_iic_wrap_c[all …]
1 // SPDX-License-Identifier: GPL-2.0-only4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>6 #include <linux/clk-provider.h>10 #include "clk-mtk.h"11 #include "clk-gate.h"13 #include <dt-bindings/clock/mt8192-clk.h>35 .compatible = "mediatek,mt8192-scp_adsp",47 .name = "clk-mt8192-scp_adsp",
1 # SPDX-License-Identifier: GPL-2.0-only360 to PCI-E and USB.390 to PCI-E and USB.773 tristate "Clock driver for MediaTek MT8192"779 This driver supports MediaTek MT8192 basic clocks.782 tristate "Clock driver for MediaTek MT8192 audsys"786 This driver supports MediaTek MT8192 audsys clocks.789 tristate "Clock driver for MediaTek MT8192 camsys"793 This driver supports MediaTek MT8192 camsys and camsys_raw clocks.796 tristate "Clock driver for MediaTek MT8192 imgsys"[all …]
1 # SPDX-License-Identifier: GPL-2.02 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o5 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o6 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o7 obj-$(CONFIG_COMMON_CLK_MT6765_CAMSYS) += clk-mt6765-cam.o8 obj-$(CONFIG_COMMON_CLK_MT6765_IMGSYS) += clk-mt6765-img.o9 obj-$(CONFIG_COMMON_CLK_MT6765_MIPI0ASYS) += clk-mt6765-mipi0a.o10 obj-$(CONFIG_COMMON_CLK_MT6765_MMSYS) += clk-mt6765-mm.o11 obj-$(CONFIG_COMMON_CLK_MT6765_VCODECSYS) += clk-mt6765-vcodec.o[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8192-clk.h>9 #include <dt-bindings/gce/mt8192-gce.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/memory/mt8192-larb-port.h>13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>14 #include <dt-bindings/phy/phy.h>15 #include <dt-bindings/power/mt8192-power.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 /dts-v1/;8 #include <dt-bindings/clock/mt8195-clk.h>9 #include <dt-bindings/gce/mt8195-gce.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/interrupt-controller/irq.h>12 #include <dt-bindings/memory/mt8195-memory-port.h>13 #include <dt-bindings/phy/phy.h>14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>15 #include <dt-bindings/power/mt8195-power.h>[all …]