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/third_party/lz4/contrib/snap/
Dsnapcraft.yaml6 speed > 500 MB/s per core, scalable with multi-cores CPU. It features an
8 reaching RAM speed limits on multi-core systems.
20 LZ4 library is provided as open-source software using BSD 2-Clause license.
/third_party/mbedtls/3rdparty/p256-m/p256-m/
DREADME.md1 *This is the original README for the p256-m repository. Please note that as
2 only a subset of p256-m's files are present in Mbed TLS, this README may refer
5 p256-m is a minimalistic implementation of ECDH and ECDSA on NIST P-256,
6 especially suited to constrained 32-bit environments. It's written in standard
7 C, with optional bits of assembly for Arm Cortex-M and Cortex-A CPUs.
16 some might even risk weakening security for more speed. p256-m was written
21 to existing implementations (see below) - in less than 700 LOC.
25 - [Correctness](#correctness)
26 - [Security](#security)
27 - [Code size](#code-size)
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/third_party/grpc/src/python/grpcio_tests/tests/qps/
Dworker_server.py7 # http://www.apache.org/licenses/LICENSE-2.0
52 return self._end_time - self._start_time
55 return self._utime - self._last_utime
58 return self._stime - self._last_stime
89 # pylint: disable=stop-iteration-return
91 # pylint: enable=stop-iteration-return
93 cores = multiprocessing.cpu_count()
97 yield self._get_server_status(port, cores)
101 status = self._get_server_status(port, cores)
107 def _get_server_status(self, port, cores): argument
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/third_party/mindspore/mindspore-src/source/mindspore/lite/java/src/main/java/com/mindspore/config/
DMSContext.java8 * http://www.apache.org/licenses/LICENSE-2.0
36 private static final int ERROR_VALUE = -1;
109 * @param isEnableParallel enable parallel in multi devices.
208 * set the thread affinity to CPU cores.
211 * @param mode: 0: no affinities, 1: big cores first, 2: little cores first
223 * get the thread affinity of CPU cores.
226 …* @return Thread affinity to CPU cores. 0: no affinities, 1: big cores first, 2: little cores first
239 * set the thread lists to CPU cores.
260 * get the thread lists of CPU cores.
/third_party/ltp/testcases/kernel/power_management/lib/
Dpm_sched_mc.py32 os.system('dmesg -c >/dev/null')
69 '''Return 1 if the system is multi socket else return 0
77 print("Failed to check if system is multi socket system")
88 if line.startswith('cpu cores'):
97 print("Failed to check if system is hyper-threaded")
101 ''' Return true if system has sockets has multiple cores
109 if line.startswith('cpu cores'):
127 print("Failed to check if system is multi core system")
140 if line.startswith('cpu cores'):
145 print("Failed to check if system is hyper-threaded")
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/third_party/libuv/docs/src/guide/
Dprocesses.rst10 (similar to using pipes in shells). A multi-process model with messages
14 A common refrain against event-based programs is that they cannot take
15 advantage of multiple cores in modern computers. In a multi-threaded program
17 cores, improving performance. But an event loop has only one thread. The
23 ------------------------
32 :lines: 6-8,15-
33 :emphasize-lines: 11,13-17
62 :lines: 9-12
63 :emphasize-lines: 3
68 ---------------------------
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DThreading.h1 //===-- llvm/Support/Threading.h - Control multithreading mode --*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares helper functions for running LLVM in a multi-threaded
12 //===----------------------------------------------------------------------===//
19 #include "llvm/Config/llvm-config.h" // for LLVM_ON_UNIX
52 /// Returns true if LLVM is compiled with support for multi-threading, and
63 /// \param UserFn - The callback to execute.
64 /// \param UserData - An argument to pass to the callback function.
65 /// \param StackSizeInBytes - A requested size (in bytes) for the thread stack
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/third_party/skia/third_party/externals/abseil-cpp/absl/random/internal/
Dnanobenchmark_test.cc7 // https://www.apache.org/licenses/LICENSE-2.0
53 // Avoid migrating between cores - important on multi-socket systems. in RunAll()
54 int cpu = -1; in RunAll()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/
DThreading.h1 //===-- llvm/Support/Threading.h - Control multithreading mode --*- C++ -*-===//
8 //===----------------------------------------------------------------------===//
10 // This file declares helper functions for running LLVM in a multi-threaded
13 //===----------------------------------------------------------------------===//
18 #include "llvm/Config/llvm-config.h" // for LLVM_ON_UNIX
40 /// Returns true if LLVM is compiled with support for multi-threading, and
44 /// llvm_execute_on_thread - Execute the given \p UserFn on a separate
52 /// \param UserFn - The callback to execute.
53 /// \param UserData - An argument to pass to the callback function.
54 /// \param RequestedStackSize - If non-zero, a requested size (in bytes) for
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/third_party/benchmark/docs/
Dreducing_variance.md3 <a name="disabling-cpu-frequency-scaling" />
30 sudo cpupower frequency-set --governor performance
37 cpupower frequency-info -o proc
42 <a name="reducing-variance" />
47 above](user_guide#disabling-cpu-frequency-scaling) is not the only source
51 1. On multi-core machines not all CPUs/CPU cores/CPU threads run the same
61 6. Non-uniform memory architectures (NUMA).
64 (`--benchmark_repetitions=N`) or across multiple runs of the benchmark
74 above](user_guide#disabling-cpu-frequency-scaling).
80 [boost.txt](https://www.kernel.org/doc/Documentation/cpu-freq/boost.txt)
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/third_party/mindspore/mindspore-src/source/include/api/
Dcontext.h2 * Copyright 2020-2023 Huawei Technologies Co., Ltd
8 * http://www.apache.org/licenses/LICENSE-2.0
42 //ohos-only device range[60,80)
91 /// \brief Set the thread affinity to CPU cores.
93 /// \param[in] mode: 0: no affinities, 1: big cores first, 2: little cores first
96 /// \brief Get the thread affinity of CPU cores.
98 …/// \return Thread affinity to CPU cores. 0: no affinities, 1: big cores first, 2: little cores fi…
101 /// \brief Set the thread lists to CPU cores.
109 /// \brief Get the thread lists of CPU cores.
124 /// \brief Set built-in delegate mode to access third-party AI framework.
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/third_party/mindspore/mindspore-src/source/mindspore/ccsrc/plugin/device/ascend/kernel/aicpu/aicpu_ops/cpu_kernel/ms_kernel/
Dkldivlossgrad.cc2 * Copyright (c) Huawei Technologies Co., Ltd. 2021-2021. All rights reserved.
8 * http://www.apache.org/licenses/LICENSE-2.0
47 *output = -Eigen::exp(target) * grad; in KlDivLossGradOp()
53 (*output)(idx) = -target(idx) * grad(idx); in KlDivLossGradOp()
59 (*output)(idx) = -target(idx) * grad(0); in KlDivLossGradOp()
71 if (grad->GetDataSize() == 0) { in KlDivLossGradExtraCheck()
75 if (input->GetDataSize() == 0) { in KlDivLossGradExtraCheck()
79 if (target->GetDataSize() == 0) { in KlDivLossGradExtraCheck()
83 if (output->GetDataSize() == 0) { in KlDivLossGradExtraCheck()
87 …if ((input->GetDataType() != grad->GetDataType()) || (target->GetDataType() != grad->GetDataType()… in KlDivLossGradExtraCheck()
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Dsparse_softmax_cross_entropy_with_logits.cc2 Copyright (c) Huawei Technologies Co., Ltd. 2021-2023. All rights reserved.
8 * http://www.apache.org/licenses/LICENSE-2.0
56 output_backprop[index] = Eigen::numext::exp(input_features[index] - dims_maximum[batch_idx]); in SparseSoftmaxCrossEntropyWithLogitsSingleOp()
72 *(output_loss + index) = -Eigen::numext::log(*(output_backprop + batch_base + offset)); in SparseSoftmaxCrossEntropyWithLogitsSingleOp()
73 …*(output_backprop + batch_base + offset) = *(output_backprop + batch_base + offset) - constant_one; in SparseSoftmaxCrossEntropyWithLogitsSingleOp()
95 output_backprop[idx] = Eigen::numext::exp(input_features[idx] - max_value); in SparseSoftmaxCrossEntropyWithLogitsMultiOp()
102 output_loss[index] = -Eigen::numext::log(output_backprop[idx]); in SparseSoftmaxCrossEntropyWithLogitsMultiOp()
103 output_backprop[idx] = output_backprop[idx] - constant_one; in SparseSoftmaxCrossEntropyWithLogitsMultiOp()
114 std::vector<int64_t> features_dims = input_features->GetTensorShape()->GetDimSizes(); in SparseSoftmaxCrossEntropyWithLogitsExtraCheck()
115 std::vector<int64_t> labels_dims = input_labels->GetTensorShape()->GetDimSizes(); in SparseSoftmaxCrossEntropyWithLogitsExtraCheck()
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/third_party/lz4/
DREADME.md1 LZ4 - Extremely fast compression
6 scalable with multi-cores CPU.
9 typically reaching RAM speed limits on multi-core systems.
17 …with [dictionary compression](https://github.com/facebook/zstd#the-case-for-small-data-compression…
18 …81) and [CLI](https://github.com/lz4/lz4/blob/v1.8.3/programs/lz4.1.md#operation-modifiers) levels.
20 …onary Builder](https://github.com/facebook/zstd/blob/v1.3.5/programs/zstd.1.md#dictionary-builder),
24 LZ4 library is provided as open-source software using BSD 2-Clause license.
28 |------------|---------|
32 [AppveyorLink]: https://ci.appveyor.com/project/YannCollet/lz4-1lndh
36 -------------------------
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/third_party/rust/rust/library/portable-simd/
Dbeginners-guide.md13Multi-core processors. By giving a processor more than one core, each core can do its own work, an…
14 …t a time, which is *almost* as good as just having a faster CPU. As with multi-core programming, S…
26 …hat can be represented as a single element, mostly numbers like 6, 3.14, or -2. It can also be use…
28 …a lane. If you have `N` lanes available then they're numbered from `0` to `N-1` when referring to …
30-bit SIMD" has 128-bit vectors, and that might be `f32x4`, `i32x4`, `i16x8`, or other variations. …
32-wide registers that are used for SIMD operations are commonly called vector registers, though you…
44 … registers can be used as 64-bit or 128-bit. When doing 128-bit operations it just uses two 64-bit…
49 * 128-bit: `sse`, `sse2`, `sse3`, `ssse3` (not a typo!), `sse4.1`, `sse4.2`, `sse4a` (AMD only)
50 * 256-bit (mostly): `avx`, `avx2`, `fma`
51 * 512-bit (mostly): a *wide* range of `avx512` variations
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/third_party/grpc/test/cpp/microbenchmarks/
Dbm_cq_multiple_threads.cc9 // http://www.apache.org/licenses/LICENSE-2.0
55 gpr_mu_init(&ps->mu); in pollset_init()
56 *mu = &ps->mu; in pollset_init()
59 static void pollset_destroy(grpc_pollset* ps) { gpr_mu_destroy(&ps->mu); } in pollset_destroy()
77 VLOG(2) << "no-op"; in pollset_work()
81 gpr_mu_unlock(&ps->mu); in pollset_work()
88 grpc_core::ExecCtx::Get()->Flush(); in pollset_work()
89 gpr_mu_lock(&ps->mu); in pollset_work()
139 // A few notes about Multi-threaded benchmarks:
155 // constructed after grpc_init because it needs the number of cores, initialized
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/third_party/ffmpeg/libavcodec/
Dframe_thread_encoder.c18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
79 ThreadContext *c = avctx->internal->frame_thread_encoder; in worker()
81 while (!atomic_load(&c->exit)) { in worker()
88 pthread_mutex_lock(&c->task_fifo_mutex); in worker()
89 while (c->next_task_index == c->task_index || atomic_load(&c->exit)) { in worker()
90 if (atomic_load(&c->exit)) { in worker()
91 pthread_mutex_unlock(&c->task_fifo_mutex); in worker()
94 pthread_cond_wait(&c->task_fifo_cond, &c->task_fifo_mutex); in worker()
96 task_index = c->next_task_index; in worker()
97 c->next_task_index = (c->next_task_index + 1) % c->max_tasks; in worker()
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/third_party/vulkan-loader/
DBUILD.md7 - [Build Instructions](#build-instructions)
8 - [Table Of Contents](#table-of-contents)
9 - [Contributing to the Repository](#contributing-to-the-repository)
10 - [Repository Content](#repository-content)
11 - [Installed Files](#installed-files)
12 - [Build Requirements](#build-requirements)
13 - [Test Requirements](#test-requirements)
14 - [Repository Set-Up](#repository-set-up)
15 - [Display Drivers](#display-drivers)
16 - [Repository Dependencies](#repository-dependencies)
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/third_party/lzma/DOC/
Dlzma-history.txt2 -----------------------
4 24.09 2024-11-29
5 -------------------------
6 - The default dictionary size values for LZMA/LZMA2 compression methods were increased:
9 32-bit 64-bit
10 8 MB 16 MB 16 MB -mx4
11 16 MB 32 MB 32 MB -mx5 : Normal
12 32 MB 64 MB 64 MB -mx6
13 32 MB 64 MB 128 MB -mx7 : Maximum
14 64 MB 64 MB 256 MB -mx8
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/third_party/elfio/c_wrapper/
Delf_types_c_wrapper.hpp2 Copyright (C) 2001-present by Serge Lamikhov-Center
93 #define EM_MIPS 8 // MIPS R3000 (officially, big-endian only)
95 #define EM_MIPS_RS3_LE 10 // MIPS R3000 little-endian (Deprecated)
106 #define EM_PPC64 21 // 64-bit PowerPC
129 #define EM_SPARCV9 43 // SPARC v9 64-bit
131 #define EM_ARC 45 // ARC Cores
136 #define EM_IA_64 50 // Intel IA-64 Processor
137 #define EM_MIPS_X 51 // Stanford MIPS-X
148 #define EM_X86_64 62 // Advanced Micro Devices X86-64 processor
150 #define EM_PDP10 64 // Digital Equipment Corp. PDP-10
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/third_party/openssl/crypto/sha/asm/
Dsha1-sparcv9.pl2 # Copyright 2007-2021 The OpenSSL Project Authors. All Rights Reserved.
19 # Performance improvement is not really impressive on pre-T1 CPU: +8%
21 # turned to be 40% faster than 64-bit code generated by Sun C 5.8 and
22 # >2x than 64-bit code generated by gcc 3.4. And there is a gimmick.
23 # X[16] vector is packed to 8 64-bit registers and as result nothing
26 # subject to [inter-thread] cache-thrashing hazard. The goal is to
28 # amount of active threads exceeds the number of physical cores.
31 # faster than software. Multi-process benchmark saturates at 11x
32 # single-process result on 8-core processor, or ~9GBps per 2.85GHz
287 save %sp,-STACK_FRAME,%sp
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/third_party/mesa3d/src/imagination/rogue/passes/
Drogue_schedule_instr_groups.c142 const rogue_alu_op_info *info = &rogue_alu_op_infos[alu->op]; in rogue_lower_alu_io()
143 enum rogue_instr_phase phase = alu->instr.index; in rogue_lower_alu_io()
145 for (unsigned u = 0; u < info->num_dsts; ++u) { in rogue_lower_alu_io()
146 if (info->phase_io[phase].dst[u] == ROGUE_IO_INVALID) in rogue_lower_alu_io()
149 rogue_set_io_sel(&group->io_sel, in rogue_lower_alu_io()
150 group->header.alu, in rogue_lower_alu_io()
151 info->phase_io[phase].dst[u], in rogue_lower_alu_io()
152 &alu->dst[u].ref, in rogue_lower_alu_io()
154 alu->dst[u].ref = rogue_ref_io(info->phase_io[phase].dst[u]); in rogue_lower_alu_io()
157 for (unsigned u = 0; u < info->num_srcs; ++u) { in rogue_lower_alu_io()
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/third_party/libexif/po/
Dpt_BR.po4 # These translations are licensed under a BSD-style license
7 # SPDX-License-Identifier: BSD-3-Clause
11 "Project-Id-Version: libexif\n"
12 "Report-Msgid-Bugs-To: libexif-devel@lists.sourceforge.net\n"
13 "POT-Creation-Date: 2025-01-17 15:27+0100\n"
14 "PO-Revision-Date: 2013-10-11 00:40+0000\n"
15 "Last-Translator: Juliano Fischer Naves <julianofischer@gmail.com>\n"
16 "Language-Team: Portuguese (Brazil) <pt_BR@li.org>\n"
18 "MIME-Version: 1.0\n"
19 "Content-Type: text/plain; charset=UTF-8\n"
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/third_party/elfutils/
DNEWS12 readelf: Support readelf -Ds, --use-dynamic --symbol.
21 -wal management during scanning using the
22 --scan-checkpoint option.
28 configure: eu-nm, eu-addr2line and eu-stack can provide demangled symbols
29 when linked with libstdc++. Use --disable-demangler to disable.
31 A new option --enable-sanitize-memory has been added for msan
40 elfcompress: -t, --type= now support zstd if libelf has been build with
47 readelf: Add -D, --use-dynamic option.
49 debuginfod-client: Add $DEBUGINFOD_HEADERS_FILE setting to supply outgoing
52 debuginfod: Add --disable-source-scan option.
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/third_party/mindspore/mindspore-src/source/mindspore/lite/python/api/
Dmodel.py1 # Copyright 2022-2023 Huawei Technologies Co., Ltd
7 # http://www.apache.org/licenses/LICENSE-2.0
153- Usage 1: Set mixed precision inference. The content and description of the configuration file ar…
156 .. code-block::
162- Usage 2: When GPU inference, set the configuration of TensorRT. The content and description of t…
165 .. code-block::
179 .. code-block::
186 .. code-block::
274 # pylint: disable=useless-super-delegation
290 # pylint: disable=useless-super-delegation
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