Home
last modified time | relevance | path

Searched +full:multicast +full:- +full:filter +full:- +full:bins (Results 1 – 25 of 40) sorted by relevance

12

/kernel/linux/linux-5.10/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
28 * @mcast_bins: Multicast filtering bins
30 * this function validates the number of Multicast filtering bins specified
32 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
33 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
35 * invalid and will cause the filtering algorithm to use Multicast
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
63 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
[all …]
Dstmmac_pci.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd
12 #include <linux/clk-provider.h>
24 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in common_default_data()
25 plat->has_gmac = 1; in common_default_data()
26 plat->force_sf_dma_mode = 1; in common_default_data()
28 plat->mdio_bus_data->needs_reset = true; in common_default_data()
30 /* Set default value for multicast hash bins */ in common_default_data()
31 plat->multicast_filter_bins = HASH_TABLE_SIZE; in common_default_data()
33 /* Set default value for unicast filter entries */ in common_default_data()
[all …]
Ddwmac-generic.c4 * Copyright (C) 2007-2011 STMicroelectronics Ltd
29 if (pdev->dev.of_node) { in dwmac_generic_probe()
32 dev_err(&pdev->dev, "dt configuration failed\n"); in dwmac_generic_probe()
36 plat_dat = dev_get_platdata(&pdev->dev); in dwmac_generic_probe()
38 dev_err(&pdev->dev, "no platform data provided\n"); in dwmac_generic_probe()
39 return -EINVAL; in dwmac_generic_probe()
42 /* Set default value for multicast hash bins */ in dwmac_generic_probe()
43 plat_dat->multicast_filter_bins = HASH_TABLE_SIZE; in dwmac_generic_probe()
45 /* Set default value for unicast filter entries */ in dwmac_generic_probe()
46 plat_dat->unicast_filter_entries = 1; in dwmac_generic_probe()
[all …]
Ddwmac-loongson.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk-provider.h>
19 plat->bus_id = (pci_domain_nr(pdev->bus) << 16) | PCI_DEVID(pdev->bus->number, pdev->devfn); in common_default_data()
20 plat->interface = PHY_INTERFACE_MODE_GMII; in common_default_data()
22 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in common_default_data()
23 plat->has_gmac = 1; in common_default_data()
24 plat->force_sf_dma_mode = 1; in common_default_data()
26 /* Set default value for multicast hash bins */ in common_default_data()
27 plat->multicast_filter_bins = 256; in common_default_data()
29 /* Set default value for unicast filter entries */ in common_default_data()
[all …]
Ddwmac-intel.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk-provider.h>
8 #include "dwmac-intel.h"
41 int func = PCI_FUNC(pdev->devfn); in stmmac_pci_find_phy_addr()
46 return -ENODEV; in stmmac_pci_find_phy_addr()
48 dmi_data = dmi_id->driver_data; in stmmac_pci_find_phy_addr()
49 func_data = dmi_data->func; in stmmac_pci_find_phy_addr()
51 for (n = 0; n < dmi_data->nfuncs; n++, func_data++) in stmmac_pci_find_phy_addr()
52 if (func_data->func == func) in stmmac_pci_find_phy_addr()
53 return func_data->phy_addr; in stmmac_pci_find_phy_addr()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
28 * @mcast_bins: Multicast filtering bins
30 * this function validates the number of Multicast filtering bins specified
32 * 64 bins, 128 bins, or 256 bins. "bins" refer to the division of CRC
33 * number space. 64 bins correspond to 6 bits of the CRC, 128 corresponds
35 * invalid and will cause the filtering algorithm to use Multicast
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
63 * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
[all …]
Ddwmac-generic.c4 * Copyright (C) 2007-2011 STMicroelectronics Ltd
29 if (pdev->dev.of_node) { in dwmac_generic_probe()
32 dev_err(&pdev->dev, "dt configuration failed\n"); in dwmac_generic_probe()
36 plat_dat = dev_get_platdata(&pdev->dev); in dwmac_generic_probe()
38 dev_err(&pdev->dev, "no platform data provided\n"); in dwmac_generic_probe()
39 return -EINVAL; in dwmac_generic_probe()
42 /* Set default value for multicast hash bins */ in dwmac_generic_probe()
43 plat_dat->multicast_filter_bins = HASH_TABLE_SIZE; in dwmac_generic_probe()
45 /* Set default value for unicast filter entries */ in dwmac_generic_probe()
46 plat_dat->unicast_filter_entries = 1; in dwmac_generic_probe()
[all …]
Dstmmac_pci.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd
12 #include <linux/clk-provider.h>
24 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in common_default_data()
25 plat->has_gmac = 1; in common_default_data()
26 plat->force_sf_dma_mode = 1; in common_default_data()
28 plat->mdio_bus_data->needs_reset = true; in common_default_data()
30 /* Set default value for multicast hash bins */ in common_default_data()
31 plat->multicast_filter_bins = HASH_TABLE_SIZE; in common_default_data()
33 /* Set default value for unicast filter entries */ in common_default_data()
[all …]
Ddwmac-loongson.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk-provider.h>
12 #define DRIVER_NAME "dwmac-loongson-pci"
17 plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */ in loongson_default_data()
18 plat->has_gmac = 1; in loongson_default_data()
19 plat->force_sf_dma_mode = 1; in loongson_default_data()
21 /* Set default value for multicast hash bins */ in loongson_default_data()
22 plat->multicast_filter_bins = HASH_TABLE_SIZE; in loongson_default_data()
24 /* Set default value for unicast filter entries */ in loongson_default_data()
25 plat->unicast_filter_entries = 1; in loongson_default_data()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
[all …]
Dstarfive,jh7110-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Emil Renner Berthing <kernel@esmil.dk>
12 - Samin Guo <samin.guo@starfivetech.com>
19 - starfive,jh7110-dwmac
21 - compatible
26 - enum:
27 - starfive,jh7110-dwmac
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/agilex-clock.h>
12 compatible = "intel,socfpga-agilex";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qed/
Dqed_l2.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
11 #include <linux/dma-mapping.h>
63 return -ENOMEM; in qed_l2_alloc()
64 p_hwfn->p_l2_info = p_l2_info; in qed_l2_alloc()
66 if (IS_PF(p_hwfn->cdev)) { in qed_l2_alloc()
67 p_l2_info->queues = RESC_NUM(p_hwfn, QED_L2_QUEUE); in qed_l2_alloc()
74 p_l2_info->queues = max_t(u8, rx, tx); in qed_l2_alloc()
77 pp_qids = kcalloc(p_l2_info->queues, sizeof(unsigned long *), in qed_l2_alloc()
[all …]
Dqed_l2.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
85 /* MOVE is not supported for multicast */
95 * @brief qed_eth_rx_queue_stop - This ramrod closes an Rx queue
114 * @brief qed_eth_tx_queue_stop - closes a Tx queue
117 * @param p_txq - handle to Tx queue needed to be closed
193 u32 bins[8]; member
208 * @brief qed_sp_vport_stop -
228 * @brief qed_sp_rx_eth_queues_update -
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qed/
Dqed_l2.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
11 #include <linux/dma-mapping.h>
63 return -ENOMEM; in qed_l2_alloc()
64 p_hwfn->p_l2_info = p_l2_info; in qed_l2_alloc()
66 if (IS_PF(p_hwfn->cdev)) { in qed_l2_alloc()
67 p_l2_info->queues = RESC_NUM(p_hwfn, QED_L2_QUEUE); in qed_l2_alloc()
74 p_l2_info->queues = max_t(u8, rx, tx); in qed_l2_alloc()
77 pp_qids = kcalloc(p_l2_info->queues, sizeof(unsigned long *), in qed_l2_alloc()
[all …]
/kernel/linux/linux-5.10/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/kernel/linux/linux-6.6/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_sp.c3 * Copyright 2011-2013 Broadcom Corporation
10 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
38 * bnx2x_exe_queue_init - init the Exe Queue object
62 INIT_LIST_HEAD(&o->exe_queue); in bnx2x_exe_queue_init()
63 INIT_LIST_HEAD(&o->pending_comp); in bnx2x_exe_queue_init()
65 spin_lock_init(&o->lock); in bnx2x_exe_queue_init()
67 o->exe_chunk_len = exe_len; in bnx2x_exe_queue_init()
68 o->owner = owner; in bnx2x_exe_queue_init()
71 o->validate = validate; in bnx2x_exe_queue_init()
72 o->remove = remove; in bnx2x_exe_queue_init()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_sp.c3 * Copyright 2011-2013 Broadcom Corporation
10 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
38 * bnx2x_exe_queue_init - init the Exe Queue object
62 INIT_LIST_HEAD(&o->exe_queue); in bnx2x_exe_queue_init()
63 INIT_LIST_HEAD(&o->pending_comp); in bnx2x_exe_queue_init()
65 spin_lock_init(&o->lock); in bnx2x_exe_queue_init()
67 o->exe_chunk_len = exe_len; in bnx2x_exe_queue_init()
68 o->owner = owner; in bnx2x_exe_queue_init()
71 o->validate = validate; in bnx2x_exe_queue_init()
72 o->remove = remove; in bnx2x_exe_queue_init()
[all …]

12