| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mux/ |
| D | mux-consumer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 Mux controller consumers should specify a list of mux controllers that they
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
18 mux-ctrl-phandle : phandle to mux controller node
[all …]
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| D | mux-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 A multiplexer (or mux) controller will have one, or several, consumer devices
14 that uses the mux controller. Thus, a mux controller can possibly control
16 multiplexer needed by each consumer, but a single mux controller can of course
17 control several multiplexers for a single consumer.
19 A mux controller provides a number of states to its consumers, and the state
[all …]
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| D | adi,adg792a.txt | 4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.yaml
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
[all …]
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| D | gpio-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based multiplexer controller
10 - Peter Rosin <peda@axentia.se>
13 Define what GPIO pins are used to control a multiplexer. Or several
14 multiplexers, if the same pins control more than one multiplexer.
22 const: gpio-mux
24 mux-gpios:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mux/ |
| D | mux-controller.txt | 4 A multiplexer (or mux) controller will have one, or several, consumer devices
5 that uses the mux controller. Thus, a mux controller can possibly control
7 multiplexer needed by each consumer, but a single mux controller can of course
8 control several multiplexers for a single consumer.
10 A mux controller provides a number of states to its consumers, and the state
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
18 Mux controller consumers should specify a list of mux controllers that they
19 want to use with a property containing a 'mux-ctrl-list':
[all …]
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| D | adi,adg792a.txt | 4 - compatible : "adi,adg792a" or "adi,adg792g"
5 - #mux-control-cells : <0> if parallel (the three muxes are bound together
6 with a single mux controller controlling all three muxes), or <1> if
7 not (one mux controller for each mux).
8 * Standard mux-controller bindings as described in mux-controller.txt
11 - gpio-controller : if present, #gpio-cells below is required.
12 - #gpio-cells : should be <2>
13 - First cell is the GPO line number, i.e. 0 or 1
14 - Second cell is used to specify active high (0)
18 - idle-state : if present, array of states that the mux controllers will have
[all …]
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| D | gpio-mux.txt | 1 GPIO-based multiplexer controller bindings
3 Define what GPIO pins are used to control a multiplexer. Or several
4 multiplexers, if the same pins control more than one multiplexer.
7 - compatible : "gpio-mux"
8 - mux-gpios : list of gpios used to control the multiplexer, least
10 - #mux-control-cells : <0>
11 * Standard mux-controller bindings as decribed in mux-controller.txt
14 - idle-state : if present, the state the mux will have when idle. The
23 mux: mux-controller {
24 compatible = "gpio-mux";
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/multiplexer/ |
| D | io-channel-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
16 For each non-empty string in the channels property, an io-channel will be
17 created. The number of this io-channel is the same as the index into the list
18 of strings in the channels property, and also matches the mux controller
19 state. The mux controller state is described in
20 Documentation/devicetree/bindings/mux/mux-controller.yaml
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | keystone-pll.txt | 1 Status: Unstable - ABI compatibility may be broken in the future
11 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
14 - #clock-cells : from common clock binding; shall be set to 0.
15 - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
16 - clocks : parent clock phandle
17 - reg - pll control0 and pll multipler registers
18 - reg-names : control, multiplier and post-divider. The multiplier and
19 post-divider registers are applicable only for main pll clock
20 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
25 #clock-cells = <0>;
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | keystone-pll.txt | 1 Status: Unstable - ABI compatibility may be broken in the future
11 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
14 - #clock-cells : from common clock binding; shall be set to 0.
15 - compatible : shall be "ti,keystone,main-pll-clock" or "ti,keystone,pll-clock"
16 - clocks : parent clock phandle
17 - reg - pll control0 and pll multiplier registers
18 - reg-names : control, multiplier and post-divider. The multiplier and
19 post-divider registers are applicable only for main pll clock
20 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
25 #clock-cells = <0>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | ci-hdrc-usb2.txt | 4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 secondary FIFO, s/w reset control and internal mux for root clock
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | ci-hdrc-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nvidia,tegra20-ehci
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
18 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
19 secondary FIFO, s/w reset control and internal mux for root clock
22 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/multiplexer/ |
| D | io-channel-mux.txt | 7 - compatible : "io-channel-mux"
8 - io-channels : Channel node of the parent channel that has multiplexed
10 - io-channel-names : Should be "parent".
11 - #address-cells = <1>;
12 - #size-cells = <0>;
13 - mux-controls : Mux controller node to use for operating the mux
14 - channels : List of strings, labeling the mux controller states.
16 For each non-empty string in the channels property, an io-channel will
17 be created. The number of this io-channel is the same as the index into
18 the list of strings in the channels property, and also matches the mux
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/ |
| D | hdmi.txt | 4 - compatible: one of the following
5 * "qcom,hdmi-tx-8996"
6 * "qcom,hdmi-tx-8994"
7 * "qcom,hdmi-tx-8084"
8 * "qcom,hdmi-tx-8974"
9 * "qcom,hdmi-tx-8660"
10 * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
13 - interrupts: The interrupt signal from the hdmi block.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | sunplus,sp7021-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dvorkin Dmitry <dvorkin@tibbo.com>
12 - Wells Lu <wellslutw@gmail.com>
15 The Sunplus SP7021 pin controller is used to control SoC pins. Please
16 refer to pinctrl-bindings.txt in this directory for details of the common
23 (1) function-group pins:
24 Ex 1 (SPI-NOR flash):
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra210-pinmux.txt | 4 - compatible: "nvidia,tegra210-pinmux"
5 - reg: Should contain a list of base address and size pairs for:
6 - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)
7 - second entry: The PINMUX_AUX_* registers (pinmux)
9 Please refer to pinctrl-bindings.txt in this directory for details of the
16 mux function to select on those pin(s)/group(s), and various pin configuration
17 parameters, such as pull-up, tristate, drive strength, etc.
23 other words, a subnode that lists a mux function but no pin configuration
26 information about e.g. the mux function or tristate parameter. For this
33 include/dt-binding/pinctrl/pinctrl-tegra.h.
[all …]
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| D | nvidia,tegra20-pinmux.txt | 4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
15 mux function to select on those pin(s)/group(s), and various pin configuration
16 parameters, such as pull-up, tristate, drive strength, etc.
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function or tristate parameter. For this
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/aspeed/ |
| D | aspeed-bmc-ampere-mtmitchell.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/gpio/aspeed-gpio.h>
12 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
20 stdout-path = &uart5;
28 reserved-memory {
29 #address-cells = <1>;
30 #size-cells = <1>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
[all …]
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| /kernel/linux/linux-6.6/drivers/mux/ |
| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #define pr_fmt(fmt) "mux-core: " fmt
19 #include <linux/mux/consumer.h>
20 #include <linux/mux/driver.h>
25 * The idle-as-is "state" is not an actual state that may be selected, it
32 * struct mux_state - Represents a mux controller state specific to a given
34 * @mux: Pointer to a mux controller.
35 * @state: State of the mux to be selected.
41 struct mux_control *mux; member
46 .name = "mux",
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | at91-natte.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller { label
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | at91-natte.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91-natte.dts - Device Tree include file for the Natte board
11 mux: mux-controller { label
12 compatible = "gpio-mux";
13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
20 batntc-mux {
21 compatible = "io-channel-mux";
22 io-channels = <&adc 5>;
23 io-channel-names = "parent";
[all …]
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