| /kernel/linux/linux-6.6/drivers/clk/ti/ |
| D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
23 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
28 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
35 val &= mux->mask; in ti_clk_mux_get_parent()
37 if (mux->table) { in ti_clk_mux_get_parent()
41 if (mux->table[i] == val) in ti_clk_mux_get_parent()
43 return -EINVAL; in ti_clk_mux_get_parent()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| D | mux.c | 6 * Tero Kristo <t-kristo@ti.com>
18 #include <linux/clk-provider.h>
31 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
36 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
42 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
43 val &= mux->mask; in ti_clk_mux_get_parent()
45 if (mux->table) { in ti_clk_mux_get_parent()
49 if (mux->table[i] == val) in ti_clk_mux_get_parent()
51 return -EINVAL; in ti_clk_mux_get_parent()
54 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | clk-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
12 #include "clk-mtk.h"
13 #include "clk-mux.h"
22 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable() local
23 u32 mask = BIT(mux->data->gate_shift); in mtk_clk_mux_enable() local
25 return regmap_update_bits(mux->regmap, mux->data->mux_ofs, in mtk_clk_mux_enable()
26 mask, ~mask); in mtk_clk_mux_enable()
31 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_disable() local
32 u32 mask = BIT(mux->data->gate_shift); in mtk_clk_mux_disable() local
34 regmap_update_bits(mux->regmap, mux->data->mux_ofs, mask, mask); in mtk_clk_mux_disable()
[all …]
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| D | clk-cpumux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
7 #include <linux/clk-provider.h>
11 #include "clk-mtk.h"
12 #include "clk-cpumux.h"
21 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_get_parent() local
24 regmap_read(mux->regmap, mux->reg, &val); in clk_cpumux_get_parent()
26 val >>= mux->shift; in clk_cpumux_get_parent()
27 val &= mux->mask; in clk_cpumux_get_parent()
34 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_set_parent() local
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | clk-krait.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
13 #include <asm/krait-l2-accessors.h>
15 #include "clk-krait.h"
21 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument
27 regval = krait_get_l2_indirect_reg(mux->offset); in __krait_mux_set_sel()
28 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel()
29 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel()
30 if (mux->lpl) { in __krait_mux_set_sel()
31 regval &= ~(mux->mask << (mux->shift + LPL_SHIFT)); in __krait_mux_set_sel()
[all …]
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| D | clk-regmap-mux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "clk-regmap-mux.h"
20 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw); in mux_get_parent() local
22 unsigned int mask = GENMASK(mux->width - 1, 0); in mux_get_parent() local
25 regmap_read(clkr->regmap, mux->reg, &val); in mux_get_parent()
27 val >>= mux->shift; in mux_get_parent()
28 val &= mask; in mux_get_parent()
30 if (mux->parent_map) in mux_get_parent()
31 return qcom_find_cfg_index(hw, mux->parent_map, val); in mux_get_parent()
38 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw); in mux_set_parent() local
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | clk-krait.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
13 #include <asm/krait-l2-accessors.h>
15 #include "clk-krait.h"
23 static void __krait_mux_set_sel(struct krait_mux_clk *mux, int sel) in __krait_mux_set_sel() argument
30 regval = krait_get_l2_indirect_reg(mux->offset); in __krait_mux_set_sel()
33 if (mux->disable_sec_src_gating) { in __krait_mux_set_sel()
35 krait_set_l2_indirect_reg(mux->offset, regval); in __krait_mux_set_sel()
38 regval &= ~(mux->mask << mux->shift); in __krait_mux_set_sel()
39 regval |= (sel & mux->mask) << mux->shift; in __krait_mux_set_sel()
[all …]
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| D | clk-regmap-mux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "clk-regmap-mux.h"
20 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw); in mux_get_parent() local
22 unsigned int mask = GENMASK(mux->width - 1, 0); in mux_get_parent() local
25 regmap_read(clkr->regmap, mux->reg, &val); in mux_get_parent()
27 val >>= mux->shift; in mux_get_parent()
28 val &= mask; in mux_get_parent()
30 if (mux->parent_map) in mux_get_parent()
31 return qcom_find_cfg_index(hw, mux->parent_map, val); in mux_get_parent()
38 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw); in mux_set_parent() local
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
10 #include <linux/clk-provider.h>
21 * prepare - clk_prepare only ensures that parents are prepared
22 * enable - clk_enable only ensures that parents are enabled
23 * rate - rate is only affected by parent switching. No clk_set_rate support
24 * parent - parent is adjustable through clk_set_parent
27 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument
29 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
30 return ioread32be(mux->reg); in clk_mux_readl()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
10 #include <linux/clk-provider.h>
20 * prepare - clk_prepare only ensures that parents are prepared
21 * enable - clk_enable only ensures that parents are enabled
22 * rate - rate is only affected by parent switching. No clk_set_rate support
23 * parent - parent is adjustable through clk_set_parent
26 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument
28 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
29 return ioread32be(mux->reg); in clk_mux_readl()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-cpumux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
7 #include <linux/clk-provider.h>
15 #include "clk-mtk.h"
16 #include "clk-cpumux.h"
22 u32 mask; member
33 struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw); in clk_cpumux_get_parent() local
36 regmap_read(mux->regmap, mux->reg, &val); in clk_cpumux_get_parent()
38 val >>= mux->shift; in clk_cpumux_get_parent()
39 val &= mux->mask; in clk_cpumux_get_parent()
[all …]
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| D | clk-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
18 #include "clk-mux.h"
35 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable_setclr() local
38 if (mux->lock) in mtk_clk_mux_enable_setclr()
39 spin_lock_irqsave(mux->lock, flags); in mtk_clk_mux_enable_setclr()
41 __acquire(mux->lock); in mtk_clk_mux_enable_setclr()
43 regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_enable_setclr()
44 BIT(mux->data->gate_shift)); in mtk_clk_mux_enable_setclr()
48 * not be effective yet. Set the update bit to ensure the mux gets in mtk_clk_mux_enable_setclr()
[all …]
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| /kernel/linux/linux-5.10/drivers/mux/ |
| D | mmio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MMIO register bitfield-controlled multiplexer driver
12 #include <linux/mux/driver.h>
18 static int mux_mmio_set(struct mux_control *mux, int state) in mux_mmio_set() argument
20 struct regmap_field **fields = mux_chip_priv(mux->chip); in mux_mmio_set()
22 return regmap_field_write(fields[mux_control_get_index(mux)], state); in mux_mmio_set()
30 { .compatible = "mmio-mux", },
31 { .compatible = "reg-mux", },
38 struct device *dev = &pdev->dev; in mux_mmio_probe()
39 struct device_node *np = dev->of_node; in mux_mmio_probe()
[all …]
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| /kernel/linux/linux-6.6/drivers/mux/ |
| D | mmio.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * MMIO register bitfield-controlled multiplexer driver
12 #include <linux/mux/driver.h>
18 static int mux_mmio_set(struct mux_control *mux, int state) in mux_mmio_set() argument
20 struct regmap_field **fields = mux_chip_priv(mux->chip); in mux_mmio_set()
22 return regmap_field_write(fields[mux_control_get_index(mux)], state); in mux_mmio_set()
30 { .compatible = "mmio-mux", },
31 { .compatible = "reg-mux", },
38 struct device *dev = &pdev->dev; in mux_mmio_probe()
39 struct device_node *np = dev->of_node; in mux_mmio_probe()
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| D | clk-muxgrf.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
23 struct rockchip_muxgrf_clock *mux = to_muxgrf_clock(hw); in rockchip_muxgrf_get_parent() local
24 unsigned int mask = GENMASK(mux->width - 1, 0); in rockchip_muxgrf_get_parent() local
27 regmap_read(mux->regmap, mux->reg, &val); in rockchip_muxgrf_get_parent()
29 val >>= mux->shift; in rockchip_muxgrf_get_parent()
30 val &= mask; in rockchip_muxgrf_get_parent()
37 struct rockchip_muxgrf_clock *mux = to_muxgrf_clock(hw); in rockchip_muxgrf_set_parent() local
38 unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); in rockchip_muxgrf_set_parent() local
42 val <<= mux->shift; in rockchip_muxgrf_set_parent()
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-muxgrf.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
23 struct rockchip_muxgrf_clock *mux = to_muxgrf_clock(hw); in rockchip_muxgrf_get_parent() local
24 unsigned int mask = GENMASK(mux->width - 1, 0); in rockchip_muxgrf_get_parent() local
27 regmap_read(mux->regmap, mux->reg, &val); in rockchip_muxgrf_get_parent()
29 val >>= mux->shift; in rockchip_muxgrf_get_parent()
30 val &= mask; in rockchip_muxgrf_get_parent()
37 struct rockchip_muxgrf_clock *mux = to_muxgrf_clock(hw); in rockchip_muxgrf_set_parent() local
38 unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); in rockchip_muxgrf_set_parent() local
42 val <<= mux->shift; in rockchip_muxgrf_set_parent()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/mdio/ |
| D | mdio-mux-mmioreg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Simple memory-mapped device MDIO MUX driver
11 #include <linux/mdio-mux.h>
22 unsigned int mask; member
28 * This function is called by the mdio-mux layer when it thinks the mdio bus
31 * 'current_child' is the current value of the mux register (masked via
32 * s->mask).
37 * The first time this function is called, current_child == -1.
39 * If current_child == desired_child, then the mux is already set to the
48 void __iomem *p = ioremap(s->phys, s->iosize); in mdio_mux_mmioreg_switch_fn()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/mdio/ |
| D | mdio-mux-mmioreg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Simple memory-mapped device MDIO MUX driver
11 #include <linux/mdio-mux.h>
22 unsigned int mask; member
28 * This function is called by the mdio-mux layer when it thinks the mdio bus
31 * 'current_child' is the current value of the mux register (masked via
32 * s->mask).
37 * The first time this function is called, current_child == -1.
39 * If current_child == desired_child, then the mux is already set to the
48 void __iomem *p = ioremap(s->phys, s->iosize); in mdio_mux_mmioreg_switch_fn()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | mdio-mux-mmioreg.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
[all …]
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| /kernel/linux/linux-6.6/drivers/iio/multiplexer/ |
| D | iio-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/mux/consumer.h>
29 struct mux { struct
40 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument
42 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
43 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
47 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select()
48 mux->delay_us); in iio_mux_select()
50 mux->cached_state = -1; in iio_mux_select()
54 if (mux->cached_state == chan->channel) in iio_mux_select()
[all …]
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| /kernel/linux/linux-5.10/drivers/iio/multiplexer/ |
| D | iio-mux.c | 1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/mux/consumer.h>
28 struct mux { struct
38 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument
40 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
41 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
45 ret = mux_control_select(mux->control, chan->channel); in iio_mux_select()
47 mux->cached_state = -1; in iio_mux_select()
51 if (mux->cached_state == chan->channel) in iio_mux_select()
54 if (chan->ext_info) { in iio_mux_select()
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | mdio-mux-mmioreg.txt | 1 Properties for an MDIO bus multiplexer controlled by a memory-mapped device
3 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
4 like an FPGA, is used to control which child bus is connected. The mdio-mux
5 node must be a child of the memory-mapped device. The driver currently only
6 supports devices with 8, 16 or 32-bit registers.
10 - compatible : string, must contain "mdio-mux-mmioreg"
12 - reg : integer, contains the offset of the register that controls the bus
16 - mux-mask : integer, contains an eight-bit mask that specifies which
18 'reg' property of each child mdio-mux node must be constrained by
19 this mask.
[all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-davinci/ |
| D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Utility to set the DAVINCI MUX register from a table in mux.h
7 * Based on linux/arch/arm/plat-omap/mux.c:
8 * Copyright (C) 2003 - 2005 Nokia Corporation
23 #include "mux.h"
29 * Sets the DAVINCI MUX register based on the table
38 unsigned int mask, warn = 0; in davinci_cfg_reg() local
40 if (WARN_ON(!soc_info->pinmux_pins)) in davinci_cfg_reg()
41 return -ENODEV; in davinci_cfg_reg()
44 pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); in davinci_cfg_reg()
[all …]
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