Home
last modified time | relevance | path

Searched full:mux (Results 1 – 25 of 3461) sorted by relevance

12345678910>>...139

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mux/
Dmux-controller.txt4 A multiplexer (or mux) controller will have one, or several, consumer devices
5 that uses the mux controller. Thus, a mux controller can possibly control
7 multiplexer needed by each consumer, but a single mux controller can of course
10 A mux controller provides a number of states to its consumers, and the state
18 Mux controller consumers should specify a list of mux controllers that they
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23 mux-ctrl-phandle : phandle to mux controller node
24 mux-ctrl-specifier : array of #mux-control-cells specifying the
[all …]
/kernel/liteos_a/testsuites/kernel/sample/kernel_base/ipc/
DBUILD.gn32 sources = [ "mux/It_los_mux.c" ]
35 "mux/full/It_los_mutex_006.c",
36 "mux/full/It_los_mutex_007.c",
37 "mux/full/It_los_mutex_008.c",
38 "mux/full/It_los_mutex_009.c",
39 "mux/full/It_los_mutex_010.c",
40 "mux/full/It_los_mutex_011.c",
41 "mux/full/It_los_mutex_012.c",
42 "mux/full/It_los_mutex_013.c",
43 "mux/full/It_los_mutex_015.c",
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mux/
Dmux-consumer.yaml4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
13 Mux controller consumers should specify a list of mux controllers that they
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
18 mux-ctrl-phandle : phandle to mux controller node
19 mux-ctrl-specifier : array of #mux-control-cells specifying the
20 given mux controller (controller specific)
22 Mux controller properties should be named "mux-controls". The exact meaning of
23 each mux controller property must be documented in the device tree binding for
[all …]
Dmux-controller.yaml4 $id: http://devicetree.org/schemas/mux/mux-controller.yaml#
13 A multiplexer (or mux) controller will have one, or several, consumer devices
14 that uses the mux controller. Thus, a mux controller can possibly control
16 multiplexer needed by each consumer, but a single mux controller can of course
19 A mux controller provides a number of states to its consumers, and the state
24 Mux controller nodes
27 Mux controller nodes must specify the number of cells used for the
28 specifier using the '#mux-control-cells' or '#mux-state-cells' property.
29 The value of '#mux-state-cells' will always be one greater than the value
30 of '#mux-control-cells'.
[all …]
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mux.c13 #include "clk-mux.h"
22 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable() local
23 u32 mask = BIT(mux->data->gate_shift); in mtk_clk_mux_enable()
25 return regmap_update_bits(mux->regmap, mux->data->mux_ofs, in mtk_clk_mux_enable()
31 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_disable() local
32 u32 mask = BIT(mux->data->gate_shift); in mtk_clk_mux_disable()
34 regmap_update_bits(mux->regmap, mux->data->mux_ofs, mask, mask); in mtk_clk_mux_disable()
39 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable_setclr() local
41 return regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_enable_setclr()
42 BIT(mux->data->gate_shift)); in mtk_clk_mux_enable_setclr()
[all …]
/kernel/linux/linux-6.6/drivers/mux/
Dcore.c10 #define pr_fmt(fmt) "mux-core: " fmt
19 #include <linux/mux/consumer.h>
20 #include <linux/mux/driver.h>
32 * struct mux_state - Represents a mux controller state specific to a given
34 * @mux: Pointer to a mux controller.
35 * @state: State of the mux to be selected.
41 struct mux_control *mux; member
46 .name = "mux",
72 .name = "mux-chip",
77 * mux_chip_alloc() - Allocate a mux-chip.
[all …]
/kernel/linux/linux-6.6/drivers/clk/ti/
Dmux.c23 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
28 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
34 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
35 val &= mux->mask; in ti_clk_mux_get_parent()
37 if (mux->table) { in ti_clk_mux_get_parent()
41 if (mux->table[i] == val) in ti_clk_mux_get_parent()
46 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
49 if (val && (mux->flags & CLK_MUX_INDEX_ONE)) in ti_clk_mux_get_parent()
60 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_set_parent() local
63 if (mux->table) { in ti_clk_mux_set_parent()
[all …]
/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mux.c18 #include "clk-mux.h"
35 struct mtk_clk_mux *mux = to_mtk_clk_mux(hw); in mtk_clk_mux_enable_setclr() local
38 if (mux->lock) in mtk_clk_mux_enable_setclr()
39 spin_lock_irqsave(mux->lock, flags); in mtk_clk_mux_enable_setclr()
41 __acquire(mux->lock); in mtk_clk_mux_enable_setclr()
43 regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_enable_setclr()
44 BIT(mux->data->gate_shift)); in mtk_clk_mux_enable_setclr()
48 * not be effective yet. Set the update bit to ensure the mux gets in mtk_clk_mux_enable_setclr()
51 if (mux->reparent && mux->data->upd_shift >= 0) { in mtk_clk_mux_enable_setclr()
52 regmap_write(mux->regmap, mux->data->upd_ofs, in mtk_clk_mux_enable_setclr()
[all …]
/kernel/linux/linux-6.6/drivers/iio/multiplexer/
Diio-mux.c16 #include <linux/mux/consumer.h>
29 struct mux { struct
40 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument
42 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
43 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
47 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select()
48 mux->delay_us); in iio_mux_select()
50 mux->cached_state = -1; in iio_mux_select()
54 if (mux->cached_state == chan->channel) in iio_mux_select()
67 ret = iio_write_channel_ext_info(mux->parent, attr, in iio_mux_select()
[all …]
/kernel/linux/linux-5.10/drivers/i2c/muxes/
Di2c-mux-reg.c10 #include <linux/i2c-mux.h>
15 #include <linux/platform_data/i2c-mux-reg.h>
23 static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id) in i2c_mux_reg_set() argument
25 if (!mux->data.reg) in i2c_mux_reg_set()
34 switch (mux->data.reg_size) { in i2c_mux_reg_set()
36 if (mux->data.little_endian) in i2c_mux_reg_set()
37 iowrite32(chan_id, mux->data.reg); in i2c_mux_reg_set()
39 iowrite32be(chan_id, mux->data.reg); in i2c_mux_reg_set()
40 if (!mux->data.write_only) in i2c_mux_reg_set()
41 ioread32(mux->data.reg); in i2c_mux_reg_set()
[all …]
Di2c-mux-gpio.c9 #include <linux/i2c-mux.h>
10 #include <linux/platform_data/i2c-mux-gpio.h>
25 static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned val) in i2c_mux_gpio_set() argument
31 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
36 struct gpiomux *mux = i2c_mux_priv(muxc); in i2c_mux_gpio_select() local
38 i2c_mux_gpio_set(mux, chan); in i2c_mux_gpio_select()
45 struct gpiomux *mux = i2c_mux_priv(muxc); in i2c_mux_gpio_deselect() local
47 i2c_mux_gpio_set(mux, mux->data.idle); in i2c_mux_gpio_deselect()
53 static int i2c_mux_gpio_probe_dt(struct gpiomux *mux, in i2c_mux_gpio_probe_dt() argument
75 mux->data.parent = i2c_adapter_id(adapter); in i2c_mux_gpio_probe_dt()
[all …]
/kernel/linux/linux-6.6/drivers/i2c/muxes/
Di2c-mux-reg.c10 #include <linux/i2c-mux.h>
15 #include <linux/platform_data/i2c-mux-reg.h>
23 static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id) in i2c_mux_reg_set() argument
25 if (!mux->data.reg) in i2c_mux_reg_set()
34 switch (mux->data.reg_size) { in i2c_mux_reg_set()
36 if (mux->data.little_endian) in i2c_mux_reg_set()
37 iowrite32(chan_id, mux->data.reg); in i2c_mux_reg_set()
39 iowrite32be(chan_id, mux->data.reg); in i2c_mux_reg_set()
40 if (!mux->data.write_only) in i2c_mux_reg_set()
41 ioread32(mux->data.reg); in i2c_mux_reg_set()
[all …]
/kernel/linux/linux-5.10/drivers/clk/ti/
Dmux.c31 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_get_parent() local
36 * FIXME need a mux-specific flag to determine if val is bitwise or in ti_clk_mux_get_parent()
42 val = ti_clk_ll_ops->clk_readl(&mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
43 val &= mux->mask; in ti_clk_mux_get_parent()
45 if (mux->table) { in ti_clk_mux_get_parent()
49 if (mux->table[i] == val) in ti_clk_mux_get_parent()
54 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
57 if (val && (mux->flags & CLK_MUX_INDEX_ONE)) in ti_clk_mux_get_parent()
68 struct clk_omap_mux *mux = to_clk_omap_mux(hw); in ti_clk_mux_set_parent() local
71 if (mux->table) { in ti_clk_mux_set_parent()
[all …]
/kernel/linux/linux-5.10/drivers/mux/
Dcore.c10 #define pr_fmt(fmt) "mux-core: " fmt
18 #include <linux/mux/consumer.h>
19 #include <linux/mux/driver.h>
32 .name = "mux",
59 .name = "mux-chip",
64 * mux_chip_alloc() - Allocate a mux-chip.
65 * @dev: The parent device implementing the mux interface.
66 * @controllers: The number of mux controllers to allocate for this chip.
69 * After allocating the mux-chip with the desired number of mux controllers
70 * but before registering the chip, the mux driver is required to configure
[all …]
/kernel/linux/linux-5.10/drivers/iio/multiplexer/
Diio-mux.c15 #include <linux/mux/consumer.h>
28 struct mux { struct
38 static int iio_mux_select(struct mux *mux, int idx) in iio_mux_select() argument
40 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
41 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
45 ret = mux_control_select(mux->control, chan->channel); in iio_mux_select()
47 mux->cached_state = -1; in iio_mux_select()
51 if (mux->cached_state == chan->channel) in iio_mux_select()
64 ret = iio_write_channel_ext_info(mux->parent, attr, in iio_mux_select()
69 mux_control_deselect(mux->control); in iio_mux_select()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ring_mux.c43 static inline struct amdgpu_mux_entry *amdgpu_ring_mux_sw_entry(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_sw_entry() argument
46 return ring->entry_index < mux->ring_entry_size ? in amdgpu_ring_mux_sw_entry()
47 &mux->ring_entry[ring->entry_index] : NULL; in amdgpu_ring_mux_sw_entry()
51 static void amdgpu_ring_mux_copy_pkt_from_sw_ring(struct amdgpu_ring_mux *mux, in amdgpu_ring_mux_copy_pkt_from_sw_ring() argument
56 struct amdgpu_ring *real_ring = mux->real_ring; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
76 static void amdgpu_mux_resubmit_chunks(struct amdgpu_ring_mux *mux) in amdgpu_mux_resubmit_chunks() argument
84 if (!mux->s_resubmit) in amdgpu_mux_resubmit_chunks()
87 for (i = 0; i < mux->num_ring_entries; i++) { in amdgpu_mux_resubmit_chunks()
88 if (mux->ring_entry[i].ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_mux_resubmit_chunks()
89 e = &mux->ring_entry[i]; in amdgpu_mux_resubmit_chunks()
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Dtas5086.c551 /* Input mux controls */
576 /* Output mux controls */
578 { "Channel 1 Mux", "Channel 2 Mux", "Channel 3 Mux",
579 "Channel 4 Mux", "Channel 5 Mux", "Channel 6 Mux" };
616 SND_SOC_DAPM_MUX("Channel 1 Mux", SND_SOC_NOPM, 0, 0,
618 SND_SOC_DAPM_MUX("Channel 2 Mux", SND_SOC_NOPM, 0, 0,
620 SND_SOC_DAPM_MUX("Channel 3 Mux", SND_SOC_NOPM, 0, 0,
622 SND_SOC_DAPM_MUX("Channel 4 Mux", SND_SOC_NOPM, 0, 0,
624 SND_SOC_DAPM_MUX("Channel 5 Mux", SND_SOC_NOPM, 0, 0,
626 SND_SOC_DAPM_MUX("Channel 6 Mux", SND_SOC_NOPM, 0, 0,
[all …]
Drt5665.c952 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
955 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
958 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
961 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
964 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
967 SOC_DAPM_ENUM("IF1_2 23 ADC1 Swap Mux", rt5665_if1_2_23_adc_enum);
970 SOC_DAPM_ENUM("IF1_2 45 ADC1 Swap Mux", rt5665_if1_2_45_adc_enum);
973 SOC_DAPM_ENUM("IF1_2 67 ADC1 Swap Mux", rt5665_if1_2_67_adc_enum);
1876 "DD Mux", "ADC"
1944 SOC_DAPM_ENUM("Stereo1 DMIC Mux", rt5665_sto1_dmic_enum);
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dtas5086.c551 /* Input mux controls */
576 /* Output mux controls */
578 { "Channel 1 Mux", "Channel 2 Mux", "Channel 3 Mux",
579 "Channel 4 Mux", "Channel 5 Mux", "Channel 6 Mux" };
616 SND_SOC_DAPM_MUX("Channel 1 Mux", SND_SOC_NOPM, 0, 0,
618 SND_SOC_DAPM_MUX("Channel 2 Mux", SND_SOC_NOPM, 0, 0,
620 SND_SOC_DAPM_MUX("Channel 3 Mux", SND_SOC_NOPM, 0, 0,
622 SND_SOC_DAPM_MUX("Channel 4 Mux", SND_SOC_NOPM, 0, 0,
624 SND_SOC_DAPM_MUX("Channel 5 Mux", SND_SOC_NOPM, 0, 0,
626 SND_SOC_DAPM_MUX("Channel 6 Mux", SND_SOC_NOPM, 0, 0,
[all …]
Drt5665.c956 SOC_DAPM_ENUM("IF1_1 01 ADC Swap Mux", rt5665_if1_1_01_adc_enum);
959 SOC_DAPM_ENUM("IF1_1 23 ADC Swap Mux", rt5665_if1_1_23_adc_enum);
962 SOC_DAPM_ENUM("IF1_1 45 ADC Swap Mux", rt5665_if1_1_45_adc_enum);
965 SOC_DAPM_ENUM("IF1_1 67 ADC Swap Mux", rt5665_if1_1_67_adc_enum);
968 SOC_DAPM_ENUM("IF1_2 01 ADC Swap Mux", rt5665_if1_2_01_adc_enum);
971 SOC_DAPM_ENUM("IF1_2 23 ADC1 Swap Mux", rt5665_if1_2_23_adc_enum);
974 SOC_DAPM_ENUM("IF1_2 45 ADC1 Swap Mux", rt5665_if1_2_45_adc_enum);
977 SOC_DAPM_ENUM("IF1_2 67 ADC1 Swap Mux", rt5665_if1_2_67_adc_enum);
1880 "DD Mux", "ADC"
1948 SOC_DAPM_ENUM("Stereo1 DMIC Mux", rt5665_sto1_dmic_enum);
[all …]
/kernel/linux/linux-5.10/drivers/clk/
Dclk-mux.c26 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument
28 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
29 return ioread32be(mux->reg); in clk_mux_readl()
31 return readl(mux->reg); in clk_mux_readl()
34 static inline void clk_mux_writel(struct clk_mux *mux, u32 val) in clk_mux_writel() argument
36 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_writel()
37 iowrite32be(val, mux->reg); in clk_mux_writel()
39 writel(val, mux->reg); in clk_mux_writel()
89 struct clk_mux *mux = to_clk_mux(hw); in clk_mux_get_parent() local
92 val = clk_mux_readl(mux) >> mux->shift; in clk_mux_get_parent()
[all …]
/kernel/linux/linux-6.6/include/linux/mux/
Ddriver.h3 * mux/driver.h - definitions for the multiplexer driver interface
13 #include <dt-bindings/mux/mux.h>
22 * struct mux_control_ops - Mux controller operations for a mux chip.
23 * @set: Set the state of the given mux controller.
26 int (*set)(struct mux_control *mux, int state);
30 * struct mux_control - Represents a mux controller.
31 * @lock: Protects the mux controller state.
32 * @chip: The mux chip that is handling this mux controller.
33 * @cached_state: The current mux controller state, or -1 if none.
34 * @states: The number of mux controller states.
[all …]
/kernel/linux/linux-5.10/include/linux/mux/
Ddriver.h3 * mux/driver.h - definitions for the multiplexer driver interface
13 #include <dt-bindings/mux/mux.h>
21 * struct mux_control_ops - Mux controller operations for a mux chip.
22 * @set: Set the state of the given mux controller.
25 int (*set)(struct mux_control *mux, int state);
29 * struct mux_control - Represents a mux controller.
30 * @lock: Protects the mux controller state.
31 * @chip: The mux chip that is handling this mux controller.
32 * @cached_state: The current mux controller state, or -1 if none.
33 * @states: The number of mux controller states.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmdio-mux-multiplexer.txt3 This is a special case of MDIO mux when MDIO mux is defined as a consumer
4 of a mux producer device. The mux producer can be of any type like mmio mux
5 producer, gpio mux producer or generic register based mux producer.
9 - compatible : should be "mmio-mux-multiplexer"
10 - mux-controls : mux controller node to use for operating the mux
17 Documentation/devicetree/bindings/mux/mux-controller.txt
18 and Documentation/devicetree/bindings/net/mdio-mux.txt
21 In below example the Mux producer and consumer are separate nodes.
29 mux: mux-controller { // Mux Producer
30 compatible = "reg-mux";
[all …]
/kernel/linux/linux-6.6/drivers/clk/
Dclk-mux.c27 static inline u32 clk_mux_readl(struct clk_mux *mux) in clk_mux_readl() argument
29 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_readl()
30 return ioread32be(mux->reg); in clk_mux_readl()
32 return readl(mux->reg); in clk_mux_readl()
35 static inline void clk_mux_writel(struct clk_mux *mux, u32 val) in clk_mux_writel() argument
37 if (mux->flags & CLK_MUX_BIG_ENDIAN) in clk_mux_writel()
38 iowrite32be(val, mux->reg); in clk_mux_writel()
40 writel(val, mux->reg); in clk_mux_writel()
90 struct clk_mux *mux = to_clk_mux(hw); in clk_mux_get_parent() local
93 val = clk_mux_readl(mux) >> mux->shift; in clk_mux_get_parent()
[all …]

12345678910>>...139