| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Texas Instruments GPMC NAND Flash controller. 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 14 GPMC NAND controller/Flash is represented as a child of the 20 - enum: 21 - ti,am64-nand [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | gpmc-nand.txt | 3 GPMC connected NAND (found on OMAP boards) are represented as child nodes of 4 the GPMC controller with a name of "nand". 7 explained in a separate documents - please refer to 8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt 10 For NAND specific properties such as ECC modes or bus width, please refer to 11 Documentation/devicetree/bindings/mtd/nand-controller.yaml 16 - compatible: "ti,omap2-nand" 17 - reg: range id (CS number), base offset and length of the 18 NAND I/O space 19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount. [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 20 #include <linux/omap-dma.h> 29 #include <linux/omap-gpmc.h> 30 #include <linux/platform_data/mtd-nand-omap2.h> 32 #define DRIVER_NAME "omap2-nand" 122 /* GPMC ecc engine settings for read */ 129 /* GPMC ecc engine settings for write */ 145 struct nand_chip nand; member 170 /* fields specific for BCHx_HW ECC scheme */ [all …]
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | omap2.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/dma-mapping.h> 18 #include <linux/mtd/nand-ecc-sw-bch.h> 21 #include <linux/omap-dma.h> 29 #include <linux/omap-gpmc.h> 30 #include <linux/platform_data/mtd-nand-omap2.h> 32 #define DRIVER_NAME "omap2-nand" 122 /* GPMC ecc engine settings for read */ 129 /* GPMC ecc engine settings for write */ 145 struct nand_chip nand; member [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap3-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "omap3-evm-common.dtsi" 9 #include "omap3-evm-processor-common.dtsi" 13 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&hsusb2_2_pins>; 20 ehci_phy_pins: ehci-phy-pins { 21 pinctrl-single,pins = < [all …]
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| D | omap3-evm-37xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "omap3-evm-common.dtsi" 9 #include "omap3-evm-processor-common.dtsi" 13 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&hsusb2_2_pins>; 20 ehci_phy_pins: ehci-phy-pins { 21 pinctrl-single,pins = < [all …]
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| D | dm8148-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814"; 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; [all …]
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| D | dra62x-j5eco-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814"; 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; [all …]
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| D | am335x-chilisom.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/ 7 #include <dt-bindings/interrupt-controller/irq.h> 11 compatible = "grinn,am335x-chilisom", "ti,am33xx"; 15 cpu0-supply = <&dcdc2_reg>; 26 pinctrl-names = "default"; 28 i2c0_pins: i2c0-pins { 29 pinctrl-single,pins = < 35 nandflash_pins: nandflash-pins { 36 pinctrl-single,pins = < [all …]
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| D | omap3430-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3"; 20 clock-frequency = <2600000>; 32 vmmc-supply = <&vmmc1>; 33 vqmmc-supply = <&vsim>; 35 * S6-3 must be in ON position for 8 bit mode to function 38 bus-width = <8>; 51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */ [all …]
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| D | logicpd-torpedo-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/input/input.h> 7 stdout-path = &uart1; 12 cpu0-supply = <&vcc>; 22 compatible = "gpio-leds"; 23 led-user0 { 26 linux,default-trigger = "none"; 32 #clock-cells = <0>; 33 compatible = "fixed-clock"; 34 clock-frequency = <26000000>; [all …]
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| D | am3517-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on am3517-evm.dts 11 cpu0-supply = <&vdd_core_reg>; 16 compatible = "regulator-fixed"; 17 regulator-name = "wl1271_buf"; 18 regulator-min-microvolt = <1800000>; 19 regulator-max-microvolt = <1800000>; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&wl12xx_buffer_pins>; 23 regulator-always-on; [all …]
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| D | am335x-igep0033.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x 5 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz 8 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 16 cpu0-supply = <&vdd1_reg>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&leds_pins>; 29 compatible = "gpio-leds"; 34 default-state = "on"; [all …]
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| D | dm8168-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816"; 19 compatible = "regulator-fixed"; 20 regulator-name = "vmmcsd_fixed"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap3-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "omap3-evm-common.dtsi" 9 #include "omap3-evm-processor-common.dtsi" 13 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&hsusb2_2_pins>; 21 pinctrl-single,pins = < 33 pinctrl-single,pins = < [all …]
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| D | omap3-evm-37xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "omap3-evm-common.dtsi" 9 #include "omap3-evm-processor-common.dtsi" 13 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&hsusb2_2_pins>; 21 pinctrl-single,pins = < 33 pinctrl-single,pins = < [all …]
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| D | dm8148-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814"; 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; [all …]
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| D | dra62x-j5eco-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814"; 18 compatible = "regulator-fixed"; 19 regulator-name = "vmmcsd_fixed"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 26 phy-handle = <ðphy0>; 27 phy-mode = "rgmii-id"; [all …]
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| D | am335x-chilisom.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/ 7 #include <dt-bindings/interrupt-controller/irq.h> 11 compatible = "grinn,am335x-chilisom", "ti,am33xx"; 15 cpu0-supply = <&dcdc2_reg>; 26 pinctrl-names = "default"; 29 pinctrl-single,pins = < 36 pinctrl-single,pins = < 57 pinctrl-names = "default"; 58 pinctrl-0 = <&i2c0_pins>; [all …]
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| D | omap3430-sdp.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3"; 20 clock-frequency = <2600000>; 32 vmmc-supply = <&vmmc1>; 33 vqmmc-supply = <&vsim>; 35 * S6-3 must be in ON position for 8 bit mode to function 38 bus-width = <8>; 51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */ [all …]
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| D | logicpd-torpedo-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/input/input.h> 7 stdout-path = &uart1; 12 cpu0-supply = <&vcc>; 22 compatible = "gpio-leds"; 26 linux,default-trigger = "none"; 32 #clock-cells = <0>; 33 compatible = "fixed-clock"; 34 clock-frequency = <26000000>; 44 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ [all …]
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| D | am3517-som.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Based on am3517-evm.dts 11 cpu0-supply = <&vdd_core_reg>; 16 compatible = "regulator-fixed"; 17 regulator-name = "wl1271_buf"; 18 regulator-min-microvolt = <1800000>; 19 regulator-max-microvolt = <1800000>; 20 pinctrl-names = "default"; 21 pinctrl-0 = <&wl12xx_buffer_pins>; 23 regulator-always-on; [all …]
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| D | am335x-igep0033.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x 5 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz 8 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 16 cpu0-supply = <&vdd1_reg>; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&leds_pins>; 29 compatible = "gpio-leds"; 34 default-state = "on"; [all …]
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| D | dm8168-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 9 compatible = "ti,dm8168-evm", "ti,dm8168", "ti,dm816"; 19 compatible = "regulator-fixed"; 20 regulator-name = "vmmcsd_fixed"; 21 regulator-min-microvolt = <3300000>; 22 regulator-max-microvolt = <3300000>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | ti,gpmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 16 - Asynchronous SRAM-like memories and ASICs 17 - Asynchronous, synchronous, and page mode burst NOR flash 18 - NAND flash 19 - Pseudo-SRAM devices [all …]
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