Searched full:nand_ctrl (Results 1 – 5 of 5) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | brcm,bcm4908-pinctrl.yaml | 34 hs_uart, i2c, i2s, nand_ctrl, nand_data, emmc_ctrl, usb0_pwr,
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | qcom_nandc.c | 44 #define NAND_CTRL 0xf00 macro
158 /* NAND_CTRL bits */
2769 u32 nand_ctrl; in qcom_nandc_setup() local
2779 nand_ctrl = nandc_read(nandc, NAND_CTRL); in qcom_nandc_setup()
2782 *NAND_CTRL is an operational registers, and CPU in qcom_nandc_setup()
2784 * in BAM mode. So update the NAND_CTRL register in qcom_nandc_setup()
2788 if (!(nand_ctrl & BAM_MODE_EN)) in qcom_nandc_setup()
2789 nandc_write(nandc, NAND_CTRL, nand_ctrl | BAM_MODE_EN); in qcom_nandc_setup()
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/bcmbca/ |
| D | bcm4908.dtsi | 534 pins_nand_ctrl: nand_ctrl-pins {
535 function = "nand_ctrl";
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | qcom_nandc.c | 45 #define NAND_CTRL 0xf00 macro
168 /* NAND_CTRL bits */
3159 u32 nand_ctrl; in qcom_nandc_setup() local
3171 nand_ctrl = nandc_read(nandc, NAND_CTRL); in qcom_nandc_setup()
3174 *NAND_CTRL is an operational registers, and CPU in qcom_nandc_setup()
3176 * in BAM mode. So update the NAND_CTRL register in qcom_nandc_setup()
3180 if (!(nand_ctrl & BAM_MODE_EN)) in qcom_nandc_setup()
3181 nandc_write(nandc, NAND_CTRL, nand_ctrl | BAM_MODE_EN); in qcom_nandc_setup()
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| /kernel/linux/linux-6.6/drivers/pinctrl/bcm/ |
| D | pinctrl-bcm4908.c | 394 { "nand_ctrl", nand_ctrl_groups, ARRAY_SIZE(nand_ctrl_groups) },
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