Searched full:nonsecure (Results 1 – 13 of 13) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | arm,mhu.yaml | 99 interrupts = <0 36 4>, /* LP-NonSecure */ 100 <0 35 4>, /* HP-NonSecure */ 110 mboxes = <&mhuA 1>; /* HP-NonSecure */ 111 shmem = <&cpu_scp_hpri>; /* HP-NonSecure */ 131 interrupts = <0 36 4>, /* LP-NonSecure */ 132 <0 35 4>, /* HP-NonSecure */ 142 mboxes = <&mhuB 0 0>, /* LP-NonSecure, 1st doorbell */ 143 <&mhuB 0 1>; /* LP-NonSecure, 2nd doorbell */ 160 mboxes = <&mhuB 1 2>, /* HP-NonSecure, 3rd doorbell */ 161 <&mhuB 1 3>; /* HP-NonSecure, 4th doorbell */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | arm,mhu.yaml | 99 interrupts = <0 36 4>, /* LP-NonSecure */ 100 <0 35 4>, /* HP-NonSecure */ 109 mboxes = <&mhuA 1>; /* HP-NonSecure */ 123 interrupts = <0 36 4>, /* LP-NonSecure */ 124 <0 35 4>, /* HP-NonSecure */ 133 mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */
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| /kernel/linux/linux-6.6/tools/arch/arm/include/uapi/asm/ |
| D | kvm.h | 154 * For KVM currently all guest registers are nonsecure, but we reserve a bit 155 * in the encoding to distinguish secure from nonsecure for AArch32 system 157 * register, and 0 for the nonsecure banked register or if the register is
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| /kernel/linux/linux-5.10/tools/arch/arm/include/uapi/asm/ |
| D | kvm.h | 154 * For KVM currently all guest registers are nonsecure, but we reserve a bit 155 * in the encoding to distinguish secure from nonsecure for AArch32 system 157 * register, and 0 for the nonsecure banked register or if the register is
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra194-cbb.yaml | 59 CCPLEX receives secure or nonsecure interrupt depending on error type.
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| /kernel/linux/common_modules/tzdriver/ |
| D | tc_ns_client.h | 4 * data structure declaration for nonsecure world
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/firmware/ |
| D | arm,scpi.yaml | 178 shmem = <&cpu_scp_hpri>; /* HP-NonSecure */
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| /kernel/linux/linux-6.6/drivers/hwtracing/coresight/ |
| D | coresight-etm4x.h | 706 #define ETM_EXLEVEL_NS_APP BIT(4) /* NonSecure EL0 */ 707 #define ETM_EXLEVEL_NS_OS BIT(5) /* NonSecure EL1 */ 708 #define ETM_EXLEVEL_NS_HYP BIT(6) /* NonSecure EL2 */
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| D | coresight-etm4x-core.c | 1382 * EXLEVEL_NS, for NonSecure Exception levels. in etm4_get_ns_access_type()
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| /kernel/linux/linux-5.10/drivers/dma/ |
| D | pl330.c | 305 bool nonsecure; member 1036 ns = desc->rqcfg.nonsecure ? 1 : 0; in _trigger() 1450 if (rqc->nonsecure) in _prepare_ccr() 1523 desc->rqcfg.nonsecure = 0; in pl330_submit_req() 1525 desc->rqcfg.nonsecure = 1; in pl330_submit_req()
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| /kernel/linux/linux-6.6/drivers/dma/ |
| D | pl330.c | 305 bool nonsecure; member 1036 ns = desc->rqcfg.nonsecure ? 1 : 0; in _trigger() 1450 if (rqc->nonsecure) in _prepare_ccr() 1523 desc->rqcfg.nonsecure = 0; in pl330_submit_req() 1525 desc->rqcfg.nonsecure = 1; in pl330_submit_req()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap5.dtsi | 95 /* PPI secure/nonsecure IRQ */
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap5.dtsi | 95 /* PPI secure/nonsecure IRQ */
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