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/kernel/linux/linux-6.6/drivers/video/fbdev/via/
Dvia-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/via-core.h>
14 #include "via-gpio.h"
17 * The ports we know about. Note that the port-25 gpios are not
30 .vg_name = "VGPIO0", /* Guess - not in datasheet */
70 * This structure controls the active GPIOs, which may be a subset
84 static void via_gpio_set(struct gpio_chip *chip, unsigned int nr, in via_gpio_set() argument
92 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); in via_gpio_set()
93 gpio = cfg->active_gpios[nr]; in via_gpio_set()
94 reg = via_read_reg(VIASR, gpio->vg_port_index); in via_gpio_set()
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/via/
Dvia-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/via-core.h>
12 #include <linux/via-gpio.h>
16 * The ports we know about. Note that the port-25 gpios are not
29 .vg_name = "VGPIO0", /* Guess - not in datasheet */
69 * This structure controls the active GPIOs, which may be a subset
83 static void via_gpio_set(struct gpio_chip *chip, unsigned int nr, in via_gpio_set() argument
91 spin_lock_irqsave(&cfg->vdev->reg_lock, flags); in via_gpio_set()
92 gpio = cfg->active_gpios[nr]; in via_gpio_set()
93 reg = via_read_reg(VIASR, gpio->vg_port_index); in via_gpio_set()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dsnps,dw-apb-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 GPIO-controller properties as desribed in this bindings file.
15 - Hoan Tran <hoan@os.amperecomputing.com>
16 - Serge Semin <fancer.lancer@gmail.com>
20 pattern: "^gpio@[0-9a-f]+$"
23 const: snps,dw-apb-gpio
25 "#address-cells":
[all …]
Dgpio-xgene-sb.txt1 APM X-Gene Standby GPIO controller bindings
6 +-----------------+
7 | X-Gene standby |
8 | GPIO controller +------ GPIO_0
9 +------------+ | | ...
10 | Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0
12 | (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N
14 | | EXT_INT_N | +------ GPIO_[N+9]
16 | +--------------+ +------ GPIO_MAX
17 +------------+ +-----------------+
[all …]
Dgpio-adnp.txt1 Avionic Design N-bit GPIO expander bindings
4 - compatible: should be "ad,gpio-adnp"
5 - reg: The I2C slave address for this device.
6 - interrupts: Interrupt specifier for the controllers interrupt.
7 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
9 - bit 0: polarity (0: normal, 1: inverted)
10 - gpio-controller: Marks the device as a GPIO controller
11 - nr-gpios: The number of pins supported by the controller.
15 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
19 gpioext: gpio-controller@41 {
[all …]
Dgpio-xlp.txt10 -------------------
12 - compatible: Should be one of the following:
13 - "netlogic,xlp832-gpio": For Netlogic XLP832
14 - "netlogic,xlp316-gpio": For Netlogic XLP316
15 - "netlogic,xlp208-gpio": For Netlogic XLP208
16 - "netlogic,xlp980-gpio": For Netlogic XLP980
17 - "netlogic,xlp532-gpio": For Netlogic XLP532
18 - "brcm,vulcan-gpio": For Broadcom Vulcan ARM64
19 - reg: Physical base address and length of the controller's registers.
20 - #gpio-cells: Should be two. The first cell is the pin number and the second
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/
Dsnps,dw-apb-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/snps,dw-apb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 GPIO-controller properties as described in this bindings file.
15 - Hoan Tran <hoan@os.amperecomputing.com>
16 - Serge Semin <fancer.lancer@gmail.com>
20 pattern: "^gpio@[0-9a-f]+$"
23 const: snps,dw-apb-gpio
25 "#address-cells":
[all …]
Dgpio-xgene-sb.txt1 APM X-Gene Standby GPIO controller bindings
6 +-----------------+
7 | X-Gene standby |
8 | GPIO controller +------ GPIO_0
9 +------------+ | | ...
10 | Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0
12 | (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N
14 | | EXT_INT_N | +------ GPIO_[N+9]
16 | +--------------+ +------ GPIO_MAX
17 +------------+ +-----------------+
[all …]
Dgpio-adnp.txt1 Avionic Design N-bit GPIO expander bindings
4 - compatible: should be "ad,gpio-adnp"
5 - reg: The I2C slave address for this device.
6 - interrupts: Interrupt specifier for the controllers interrupt.
7 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
9 - bit 0: polarity (0: normal, 1: inverted)
10 - gpio-controller: Marks the device as a GPIO controller
11 - nr-gpios: The number of pins supported by the controller.
15 Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
19 gpioext: gpio-controller@41 {
[all …]
/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-ich.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
21 * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and
36 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */
37 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */
38 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */
56 #define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start)
57 #define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start)
93 struct ichx_desc *desc; /* Pointer to chipset-specific description */
99 static int modparam_gpiobase = -1; /* dynamic */
[all …]
/kernel/linux/linux-6.6/drivers/gpio/
Dgpio-ich.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
19 * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and
34 {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */
35 {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */
36 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */
54 #define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start)
55 #define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start)
91 struct ichx_desc *desc; /* Pointer to chipset-specific description */
97 static int modparam_gpiobase = -1; /* dynamic */
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/synaptics/
Dberlin4ct.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "arm,psci-1.0", "arm,psci-0.2";
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a53";
33 enable-method = "psci";
[all …]
/kernel/linux/linux-5.10/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/kernel/linux/linux-6.6/arch/arc/boot/dts/
Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/kernel/linux/linux-6.6/drivers/iio/adc/
Dad7266.c1 // SPDX-License-Identifier: GPL-2.0-only
37 struct gpio_desc *gpios[3]; member
54 return spi_read(st->spi, &st->data.sample[0], 2); in ad7266_wakeup()
60 return spi_read(st->spi, &st->data.sample[0], 1); in ad7266_powerdown()
83 struct iio_dev *indio_dev = pf->indio_dev; in ad7266_trigger_handler()
87 ret = spi_read(st->spi, st->data.sample, 4); in ad7266_trigger_handler()
89 iio_push_to_buffers_with_timestamp(indio_dev, &st->data, in ad7266_trigger_handler()
90 pf->timestamp); in ad7266_trigger_handler()
93 iio_trigger_notify_done(indio_dev->trig); in ad7266_trigger_handler()
98 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr) in ad7266_select_input() argument
[all …]
/kernel/linux/linux-5.10/drivers/iio/adc/
Dad7266.c1 // SPDX-License-Identifier: GPL-2.0-only
37 struct gpio_desc *gpios[3]; member
54 return spi_read(st->spi, &st->data.sample[0], 2); in ad7266_wakeup()
60 return spi_read(st->spi, &st->data.sample[0], 1); in ad7266_powerdown()
83 struct iio_dev *indio_dev = pf->indio_dev; in ad7266_trigger_handler()
87 ret = spi_read(st->spi, st->data.sample, 4); in ad7266_trigger_handler()
89 iio_push_to_buffers_with_timestamp(indio_dev, &st->data, in ad7266_trigger_handler()
90 pf->timestamp); in ad7266_trigger_handler()
93 iio_trigger_notify_done(indio_dev->trig); in ad7266_trigger_handler()
98 static void ad7266_select_input(struct ad7266_state *st, unsigned int nr) in ad7266_select_input() argument
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dberlin2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,berlin-smp";
34 next-level-cache = <&l2>;
38 clock-latency = <100000>;
[all …]
Dberlin2cd.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 model = "Marvell Armada 1500-mini (BG2CD) SoC";
17 #address-cells = <1>;
18 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a9";
[all …]
Dkirkwood-sheevaplug-esata.dts1 // SPDX-License-Identifier: GPL-2.0
3 * kirkwood-sheevaplug-esata.dts - Device tree file for eSATA Sheevaplug
8 /dts-v1/;
10 #include "kirkwood-sheevaplug-common.dtsi"
14 …tible = "globalscale,sheevaplug-esata-rev13", "globalscale,sheevaplug-esata", "globalscale,sheevap…
19 nr-ports = <2>;
23 pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
24 pinctrl-names = "default";
26 cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
27 wp-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
[all …]
Dberlin2q.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com>
6 #include <dt-bindings/clock/berlin2q.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 model = "Marvell Armada 1500 pro (BG2-Q) SoC";
12 #address-cells = <1>;
13 #size-cells = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 enable-method = "marvell,berlin-smp";
[all …]
/kernel/linux/linux-5.10/drivers/i2c/muxes/
Di2c-mux-gpio.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/i2c-mux.h>
10 #include <linux/platform_data/i2c-mux-gpio.h>
22 struct gpio_desc **gpios; member
31 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
47 i2c_mux_gpio_set(mux, mux->data.idle); in i2c_mux_gpio_deselect()
56 struct device_node *np = pdev->dev.of_node; in i2c_mux_gpio_probe_dt()
63 return -ENODEV; in i2c_mux_gpio_probe_dt()
65 adapter_np = of_parse_phandle(np, "i2c-parent", 0); in i2c_mux_gpio_probe_dt()
67 dev_err(&pdev->dev, "Cannot parse i2c-parent\n"); in i2c_mux_gpio_probe_dt()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Dkirkwood-sheevaplug-esata.dts1 // SPDX-License-Identifier: GPL-2.0
3 * kirkwood-sheevaplug-esata.dts - Device tree file for eSATA Sheevaplug
8 /dts-v1/;
10 #include "kirkwood-sheevaplug-common.dtsi"
14 …tible = "globalscale,sheevaplug-esata-rev13", "globalscale,sheevaplug-esata", "globalscale,sheevap…
19 nr-ports = <2>;
23 pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
24 pinctrl-names = "default";
26 cd-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
27 wp-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/bitmain/
Dbm1880.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/bm1880-clock.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/bitmain,bm1880-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a53";
[all …]
/kernel/linux/linux-5.10/drivers/pcmcia/
Ddb1xxx_ss.c1 // SPDX-License-Identifier: GPL-2.0-only
13 * The Db1000 is used as a reference: Per-socket card-, carddetect- and
14 * statuschange IRQs connected to SoC GPIOs, control and status register
15 * bits arranged in per-socket groups in an external PLD. All boards
19 * - Pb1100/Pb1500: single socket only; voltage key bits VS are
21 * - Au1200-based: additional card-eject irqs, irqs not gpios!
22 * - Db1300: Db1200-like, no pwr ctrl, single socket (#1).
37 #include <asm/mach-au1x00/au1000.h>
38 #include <asm/mach-db1x00/bcsr.h>
45 int nr; /* socket number */ member
[all …]
/kernel/linux/linux-6.6/drivers/pcmcia/
Ddb1xxx_ss.c1 // SPDX-License-Identifier: GPL-2.0-only
13 * The Db1000 is used as a reference: Per-socket card-, carddetect- and
14 * statuschange IRQs connected to SoC GPIOs, control and status register
15 * bits arranged in per-socket groups in an external PLD. All boards
19 * - Pb1100/Pb1500: single socket only; voltage key bits VS are
21 * - Au1200-based: additional card-eject irqs, irqs not gpios!
22 * - Db1300: Db1200-like, no pwr ctrl, single socket (#1).
37 #include <asm/mach-au1x00/au1000.h>
38 #include <asm/mach-db1x00/bcsr.h>
45 int nr; /* socket number */ member
[all …]

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