| /kernel/linux/linux-6.6/drivers/net/ethernet/cavium/liquidio/ |
| D | cn66xx_device.c | 29 int lio_cn6xxx_soft_reset(struct octeon_device *oct) in lio_cn6xxx_soft_reset() argument
31 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
33 dev_dbg(&oct->pci_dev->dev, "BIST enabled for soft reset\n"); in lio_cn6xxx_soft_reset()
35 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_BIST); in lio_cn6xxx_soft_reset()
36 octeon_write_csr64(oct, CN6XXX_SLI_SCRATCH1, 0x1234ULL); in lio_cn6xxx_soft_reset()
38 lio_pci_readq(oct, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
39 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
44 if (octeon_read_csr64(oct, CN6XXX_SLI_SCRATCH1)) { in lio_cn6xxx_soft_reset()
45 dev_err(&oct->pci_dev->dev, "Soft reset failed\n"); in lio_cn6xxx_soft_reset()
49 dev_dbg(&oct->pci_dev->dev, "Reset completed\n"); in lio_cn6xxx_soft_reset()
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| D | cn23xx_pf_device.c | 39 void cn23xx_dump_pf_initialized_regs(struct octeon_device *oct) in cn23xx_dump_pf_initialized_regs() argument
43 struct octeon_cn23xx_pf *cn23xx = (struct octeon_cn23xx_pf *)oct->chip; in cn23xx_dump_pf_initialized_regs()
46 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%llx\n", in cn23xx_dump_pf_initialized_regs()
48 CVM_CAST64(octeon_read_csr64(oct, CN23XX_WIN_WR_MASK_REG))); in cn23xx_dump_pf_initialized_regs()
49 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n", in cn23xx_dump_pf_initialized_regs()
51 CVM_CAST64(octeon_read_csr64(oct, CN23XX_SLI_SCRATCH1))); in cn23xx_dump_pf_initialized_regs()
52 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n", in cn23xx_dump_pf_initialized_regs()
54 lio_pci_readq(oct, CN23XX_RST_SOFT_RST)); in cn23xx_dump_pf_initialized_regs()
57 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n", in cn23xx_dump_pf_initialized_regs()
59 lio_pci_readq(oct, CN23XX_DPI_DMA_CONTROL)); in cn23xx_dump_pf_initialized_regs()
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| D | cn68xx_device.c | 31 static void lio_cn68xx_set_dpi_regs(struct octeon_device *oct) in lio_cn68xx_set_dpi_regs() argument
36 lio_pci_writeq(oct, CN6XXX_DPI_DMA_CTL_MASK, CN6XXX_DPI_DMA_CONTROL); in lio_cn68xx_set_dpi_regs()
37 dev_dbg(&oct->pci_dev->dev, "DPI_DMA_CONTROL: 0x%016llx\n", in lio_cn68xx_set_dpi_regs()
38 lio_pci_readq(oct, CN6XXX_DPI_DMA_CONTROL)); in lio_cn68xx_set_dpi_regs()
45 lio_pci_writeq(oct, 0, CN6XXX_DPI_DMA_ENG_ENB(i)); in lio_cn68xx_set_dpi_regs()
46 lio_pci_writeq(oct, fifo_sizes[i], CN6XXX_DPI_DMA_ENG_BUF(i)); in lio_cn68xx_set_dpi_regs()
47 dev_dbg(&oct->pci_dev->dev, "DPI_ENG_BUF%d: 0x%016llx\n", i, in lio_cn68xx_set_dpi_regs()
48 lio_pci_readq(oct, CN6XXX_DPI_DMA_ENG_BUF(i))); in lio_cn68xx_set_dpi_regs()
55 lio_pci_writeq(oct, 1, CN6XXX_DPI_CTL); in lio_cn68xx_set_dpi_regs()
56 dev_dbg(&oct->pci_dev->dev, "DPI_CTL: 0x%016llx\n", in lio_cn68xx_set_dpi_regs()
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| D | cn23xx_vf_device.c | 30 u32 cn23xx_vf_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us) in cn23xx_vf_get_oq_ticks() argument
33 u32 oqticks_per_us = (u32)oct->pfvf_hsword.coproc_tics_per_us; in cn23xx_vf_get_oq_ticks()
50 static int cn23xx_vf_reset_io_queues(struct octeon_device *oct, u32 num_queues) in cn23xx_vf_reset_io_queues() argument
59 d64 = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
62 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
68 u64 reg_val = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
74 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
78 dev_err(&oct->pci_dev->dev, in cn23xx_vf_reset_io_queues()
85 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
89 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
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| D | octeon_device.c | 569 static void *__retrieve_octeon_config_info(struct octeon_device *oct, in __retrieve_octeon_config_info() argument
572 u32 oct_id = oct->octeon_id; in __retrieve_octeon_config_info()
577 if (oct->chip_id == OCTEON_CN66XX) { in __retrieve_octeon_config_info()
579 } else if ((oct->chip_id == OCTEON_CN68XX) && in __retrieve_octeon_config_info()
582 } else if ((oct->chip_id == OCTEON_CN68XX) && in __retrieve_octeon_config_info()
585 } else if (oct->chip_id == OCTEON_CN23XX_PF_VID) { in __retrieve_octeon_config_info()
587 } else if (oct->chip_id == OCTEON_CN23XX_VF_VID) { in __retrieve_octeon_config_info()
597 static int __verify_octeon_config_info(struct octeon_device *oct, void *conf) in __verify_octeon_config_info() argument
599 switch (oct->chip_id) { in __verify_octeon_config_info()
602 return lio_validate_cn6xxx_config_info(oct, conf); in __verify_octeon_config_info()
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| D | request_manager.c | 39 static void __check_db_timeout(struct octeon_device *oct, u64 iq_no);
47 int octeon_init_instr_queue(struct octeon_device *oct, in octeon_init_instr_queue() argument
56 int numa_node = dev_to_node(&oct->pci_dev->dev); in octeon_init_instr_queue()
58 if (OCTEON_CN6XXX(oct)) in octeon_init_instr_queue()
59 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn6xxx))); in octeon_init_instr_queue()
60 else if (OCTEON_CN23XX_PF(oct)) in octeon_init_instr_queue()
61 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn23xx_pf))); in octeon_init_instr_queue()
62 else if (OCTEON_CN23XX_VF(oct)) in octeon_init_instr_queue()
63 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn23xx_vf))); in octeon_init_instr_queue()
66 dev_err(&oct->pci_dev->dev, "Unsupported Chip %x\n", in octeon_init_instr_queue()
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| D | octeon_console.c | 35 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
38 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
139 * @param oct Pointer to current octeon device
147 static inline u64 __cvmx_bootmem_desc_get(struct octeon_device *oct, in __cvmx_bootmem_desc_get() argument
155 return octeon_read_device_mem32(oct, base); in __cvmx_bootmem_desc_get()
157 return octeon_read_device_mem64(oct, base); in __cvmx_bootmem_desc_get()
173 static void CVMX_BOOTMEM_NAMED_GET_NAME(struct octeon_device *oct, in CVMX_BOOTMEM_NAMED_GET_NAME() argument
179 octeon_pci_read_core_mem(oct, addr, (u8 *)str, len); in CVMX_BOOTMEM_NAMED_GET_NAME()
195 static int __cvmx_bootmem_check_version(struct octeon_device *oct, in __cvmx_bootmem_check_version() argument
201 if (!oct->bootmem_desc_addr) in __cvmx_bootmem_check_version()
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| D | lio_vf_rep.c | 55 lio_vf_rep_send_soft_command(struct octeon_device *oct, in lio_vf_rep_send_soft_command() argument
66 octeon_alloc_soft_command(oct, req_size, in lio_vf_rep_send_soft_command()
82 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, in lio_vf_rep_send_soft_command()
85 err = octeon_send_soft_command(oct, sc); in lio_vf_rep_send_soft_command()
89 err = wait_for_sc_completion_timeout(oct, sc, 0); in lio_vf_rep_send_soft_command()
95 dev_err(&oct->pci_dev->dev, "VF rep send config failed\n"); in lio_vf_rep_send_soft_command()
103 octeon_free_soft_command(oct, sc); in lio_vf_rep_send_soft_command()
113 struct octeon_device *oct; in lio_vf_rep_open() local
116 oct = vf_rep->oct; in lio_vf_rep_open()
123 ret = lio_vf_rep_send_soft_command(oct, &rep_cfg, in lio_vf_rep_open()
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| D | lio_core.c | 81 * @oct: octeon_device
85 int lio_setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs) in lio_setup_glists() argument
120 int numa_node = dev_to_node(&oct->pci_dev->dev); in lio_setup_glists()
127 lio_dma_alloc(oct, in lio_setup_glists()
166 struct octeon_device *oct = lio->oct_dev; in liquidio_set_feature() local
181 dev_err(&oct->pci_dev->dev, "Feature change failed in core (ret: 0x%x)\n", in liquidio_set_feature()
262 struct octeon_device *oct = lio->oct_dev; in liquidio_link_ctrl_cmd_completion() local
303 dev_info(&oct->pci_dev->dev, "%s LRO Enabled\n", netdev->name); in liquidio_link_ctrl_cmd_completion()
307 dev_info(&oct->pci_dev->dev, "%s LRO Disabled\n", in liquidio_link_ctrl_cmd_completion()
312 dev_info(&oct->pci_dev->dev, "%s Firmware debug enabled\n", in liquidio_link_ctrl_cmd_completion()
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| D | lio_ethtool.c | 219 struct octeon_device *oct = lio->oct_dev; in lio_get_link_ksettings() local
247 dev_dbg(&oct->pci_dev->dev, "ecmd->base.transceiver is XCVR_EXTERNAL\n"); in lio_get_link_ksettings()
250 dev_err(&oct->pci_dev->dev, "Unknown link interface mode: %d\n", in lio_get_link_ksettings()
260 if (oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_get_link_ksettings()
261 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID) { in lio_get_link_ksettings()
262 if (OCTEON_CN23XX_PF(oct)) { in lio_get_link_ksettings()
270 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
282 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
286 oct->speed_setting = 25; in lio_get_link_ksettings()
289 if (oct->speed_setting == 10) { in lio_get_link_ksettings()
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| D | lio_vf_main.c | 70 static int octeon_device_init(struct octeon_device *oct);
73 static int lio_wait_for_oq_pkts(struct octeon_device *oct) in lio_wait_for_oq_pkts() argument
75 struct octeon_device_priv *oct_priv = oct->priv; in lio_wait_for_oq_pkts()
83 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { in lio_wait_for_oq_pkts()
84 if (!(oct->io_qmask.oq & BIT_ULL(i))) in lio_wait_for_oq_pkts()
86 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); in lio_wait_for_oq_pkts()
102 * @oct: Pointer to Octeon device
104 static void pcierror_quiesce_device(struct octeon_device *oct) in pcierror_quiesce_device() argument
116 if (wait_for_pending_requests(oct)) in pcierror_quiesce_device()
117 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); in pcierror_quiesce_device()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/cavium/liquidio/ |
| D | cn66xx_device.c | 29 int lio_cn6xxx_soft_reset(struct octeon_device *oct) in lio_cn6xxx_soft_reset() argument
31 octeon_write_csr64(oct, CN6XXX_WIN_WR_MASK_REG, 0xFF); in lio_cn6xxx_soft_reset()
33 dev_dbg(&oct->pci_dev->dev, "BIST enabled for soft reset\n"); in lio_cn6xxx_soft_reset()
35 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_BIST); in lio_cn6xxx_soft_reset()
36 octeon_write_csr64(oct, CN6XXX_SLI_SCRATCH1, 0x1234ULL); in lio_cn6xxx_soft_reset()
38 lio_pci_readq(oct, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
39 lio_pci_writeq(oct, 1, CN6XXX_CIU_SOFT_RST); in lio_cn6xxx_soft_reset()
44 if (octeon_read_csr64(oct, CN6XXX_SLI_SCRATCH1)) { in lio_cn6xxx_soft_reset()
45 dev_err(&oct->pci_dev->dev, "Soft reset failed\n"); in lio_cn6xxx_soft_reset()
49 dev_dbg(&oct->pci_dev->dev, "Reset completed\n"); in lio_cn6xxx_soft_reset()
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| D | cn23xx_pf_device.c | 39 void cn23xx_dump_pf_initialized_regs(struct octeon_device *oct) in cn23xx_dump_pf_initialized_regs() argument
43 struct octeon_cn23xx_pf *cn23xx = (struct octeon_cn23xx_pf *)oct->chip; in cn23xx_dump_pf_initialized_regs()
46 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%llx\n", in cn23xx_dump_pf_initialized_regs()
48 CVM_CAST64(octeon_read_csr64(oct, CN23XX_WIN_WR_MASK_REG))); in cn23xx_dump_pf_initialized_regs()
49 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n", in cn23xx_dump_pf_initialized_regs()
51 CVM_CAST64(octeon_read_csr64(oct, CN23XX_SLI_SCRATCH1))); in cn23xx_dump_pf_initialized_regs()
52 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n", in cn23xx_dump_pf_initialized_regs()
54 lio_pci_readq(oct, CN23XX_RST_SOFT_RST)); in cn23xx_dump_pf_initialized_regs()
57 dev_dbg(&oct->pci_dev->dev, "%s[%llx] : 0x%016llx\n", in cn23xx_dump_pf_initialized_regs()
59 lio_pci_readq(oct, CN23XX_DPI_DMA_CONTROL)); in cn23xx_dump_pf_initialized_regs()
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| D | cn68xx_device.c | 32 static void lio_cn68xx_set_dpi_regs(struct octeon_device *oct) in lio_cn68xx_set_dpi_regs() argument
37 lio_pci_writeq(oct, CN6XXX_DPI_DMA_CTL_MASK, CN6XXX_DPI_DMA_CONTROL); in lio_cn68xx_set_dpi_regs()
38 dev_dbg(&oct->pci_dev->dev, "DPI_DMA_CONTROL: 0x%016llx\n", in lio_cn68xx_set_dpi_regs()
39 lio_pci_readq(oct, CN6XXX_DPI_DMA_CONTROL)); in lio_cn68xx_set_dpi_regs()
46 lio_pci_writeq(oct, 0, CN6XXX_DPI_DMA_ENG_ENB(i)); in lio_cn68xx_set_dpi_regs()
47 lio_pci_writeq(oct, fifo_sizes[i], CN6XXX_DPI_DMA_ENG_BUF(i)); in lio_cn68xx_set_dpi_regs()
48 dev_dbg(&oct->pci_dev->dev, "DPI_ENG_BUF%d: 0x%016llx\n", i, in lio_cn68xx_set_dpi_regs()
49 lio_pci_readq(oct, CN6XXX_DPI_DMA_ENG_BUF(i))); in lio_cn68xx_set_dpi_regs()
56 lio_pci_writeq(oct, 1, CN6XXX_DPI_CTL); in lio_cn68xx_set_dpi_regs()
57 dev_dbg(&oct->pci_dev->dev, "DPI_CTL: 0x%016llx\n", in lio_cn68xx_set_dpi_regs()
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| D | cn23xx_vf_device.c | 30 u32 cn23xx_vf_get_oq_ticks(struct octeon_device *oct, u32 time_intr_in_us) in cn23xx_vf_get_oq_ticks() argument
33 u32 oqticks_per_us = (u32)oct->pfvf_hsword.coproc_tics_per_us; in cn23xx_vf_get_oq_ticks()
50 static int cn23xx_vf_reset_io_queues(struct octeon_device *oct, u32 num_queues) in cn23xx_vf_reset_io_queues() argument
59 d64 = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
62 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
68 u64 reg_val = octeon_read_csr64(oct, in cn23xx_vf_reset_io_queues()
74 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
78 dev_err(&oct->pci_dev->dev, in cn23xx_vf_reset_io_queues()
85 octeon_write_csr64(oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no), in cn23xx_vf_reset_io_queues()
89 oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no))); in cn23xx_vf_reset_io_queues()
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| D | octeon_device.c | 569 static void *__retrieve_octeon_config_info(struct octeon_device *oct, in __retrieve_octeon_config_info() argument
572 u32 oct_id = oct->octeon_id; in __retrieve_octeon_config_info()
577 if (oct->chip_id == OCTEON_CN66XX) { in __retrieve_octeon_config_info()
579 } else if ((oct->chip_id == OCTEON_CN68XX) && in __retrieve_octeon_config_info()
582 } else if ((oct->chip_id == OCTEON_CN68XX) && in __retrieve_octeon_config_info()
585 } else if (oct->chip_id == OCTEON_CN23XX_PF_VID) { in __retrieve_octeon_config_info()
587 } else if (oct->chip_id == OCTEON_CN23XX_VF_VID) { in __retrieve_octeon_config_info()
597 static int __verify_octeon_config_info(struct octeon_device *oct, void *conf) in __verify_octeon_config_info() argument
599 switch (oct->chip_id) { in __verify_octeon_config_info()
602 return lio_validate_cn6xxx_config_info(oct, conf); in __verify_octeon_config_info()
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| D | request_manager.c | 39 static void __check_db_timeout(struct octeon_device *oct, u64 iq_no);
43 static inline int IQ_INSTR_MODE_64B(struct octeon_device *oct, int iq_no) in IQ_INSTR_MODE_64B() argument
46 (struct octeon_instr_queue *)oct->instr_queue[iq_no]; in IQ_INSTR_MODE_64B()
50 #define IQ_INSTR_MODE_32B(oct, iq_no) (!IQ_INSTR_MODE_64B(oct, iq_no)) argument
56 int octeon_init_instr_queue(struct octeon_device *oct, in octeon_init_instr_queue() argument
65 int numa_node = dev_to_node(&oct->pci_dev->dev); in octeon_init_instr_queue()
67 if (OCTEON_CN6XXX(oct)) in octeon_init_instr_queue()
68 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn6xxx))); in octeon_init_instr_queue()
69 else if (OCTEON_CN23XX_PF(oct)) in octeon_init_instr_queue()
70 conf = &(CFG_GET_IQ_CFG(CHIP_CONF(oct, cn23xx_pf))); in octeon_init_instr_queue()
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| D | octeon_console.c | 35 static u64 cvmx_bootmem_phy_named_block_find(struct octeon_device *oct,
38 static int octeon_console_read(struct octeon_device *oct, u32 console_num,
139 * @param oct Pointer to current octeon device
147 static inline u64 __cvmx_bootmem_desc_get(struct octeon_device *oct, in __cvmx_bootmem_desc_get() argument
155 return octeon_read_device_mem32(oct, base); in __cvmx_bootmem_desc_get()
157 return octeon_read_device_mem64(oct, base); in __cvmx_bootmem_desc_get()
173 static void CVMX_BOOTMEM_NAMED_GET_NAME(struct octeon_device *oct, in CVMX_BOOTMEM_NAMED_GET_NAME() argument
179 octeon_pci_read_core_mem(oct, addr, (u8 *)str, len); in CVMX_BOOTMEM_NAMED_GET_NAME()
195 static int __cvmx_bootmem_check_version(struct octeon_device *oct, in __cvmx_bootmem_check_version() argument
201 if (!oct->bootmem_desc_addr) in __cvmx_bootmem_check_version()
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| D | lio_vf_rep.c | 55 lio_vf_rep_send_soft_command(struct octeon_device *oct, in lio_vf_rep_send_soft_command() argument
66 octeon_alloc_soft_command(oct, req_size, in lio_vf_rep_send_soft_command()
82 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, in lio_vf_rep_send_soft_command()
85 err = octeon_send_soft_command(oct, sc); in lio_vf_rep_send_soft_command()
89 err = wait_for_sc_completion_timeout(oct, sc, 0); in lio_vf_rep_send_soft_command()
95 dev_err(&oct->pci_dev->dev, "VF rep send config failed\n"); in lio_vf_rep_send_soft_command()
103 octeon_free_soft_command(oct, sc); in lio_vf_rep_send_soft_command()
113 struct octeon_device *oct; in lio_vf_rep_open() local
116 oct = vf_rep->oct; in lio_vf_rep_open()
123 ret = lio_vf_rep_send_soft_command(oct, &rep_cfg, in lio_vf_rep_open()
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| D | lio_core.c | 77 * @oct: octeon_device
81 int lio_setup_glists(struct octeon_device *oct, struct lio *lio, int num_iqs) in lio_setup_glists() argument
116 int numa_node = dev_to_node(&oct->pci_dev->dev); in lio_setup_glists()
123 lio_dma_alloc(oct, in lio_setup_glists()
161 struct octeon_device *oct = lio->oct_dev; in liquidio_set_feature() local
176 dev_err(&oct->pci_dev->dev, "Feature change failed in core (ret: 0x%x)\n", in liquidio_set_feature()
256 struct octeon_device *oct = lio->oct_dev; in liquidio_link_ctrl_cmd_completion() local
297 dev_info(&oct->pci_dev->dev, "%s LRO Enabled\n", netdev->name); in liquidio_link_ctrl_cmd_completion()
301 dev_info(&oct->pci_dev->dev, "%s LRO Disabled\n", in liquidio_link_ctrl_cmd_completion()
306 dev_info(&oct->pci_dev->dev, "%s Firmware debug enabled\n", in liquidio_link_ctrl_cmd_completion()
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| D | octeon_mem_ops.c | 31 octeon_toggle_bar1_swapmode(struct octeon_device *oct, u32 idx) in octeon_toggle_bar1_swapmode() argument
35 mask = oct->fn_list.bar1_idx_read(oct, idx); in octeon_toggle_bar1_swapmode()
37 oct->fn_list.bar1_idx_write(oct, idx, mask); in octeon_toggle_bar1_swapmode()
40 #define octeon_toggle_bar1_swapmode(oct, idx) argument
44 octeon_pci_fastwrite(struct octeon_device *oct, u8 __iomem *mapped_addr, in octeon_pci_fastwrite() argument
52 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastwrite()
61 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastwrite()
68 octeon_pci_fastread(struct octeon_device *oct, u8 __iomem *mapped_addr, in octeon_pci_fastread() argument
76 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastread()
85 octeon_toggle_bar1_swapmode(oct, MEMOPS_IDX); in octeon_pci_fastread()
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| D | lio_ethtool.c | 218 struct octeon_device *oct = lio->oct_dev; in lio_get_link_ksettings() local
246 dev_dbg(&oct->pci_dev->dev, "ecmd->base.transceiver is XCVR_EXTERNAL\n"); in lio_get_link_ksettings()
249 dev_err(&oct->pci_dev->dev, "Unknown link interface mode: %d\n", in lio_get_link_ksettings()
259 if (oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_get_link_ksettings()
260 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID) { in lio_get_link_ksettings()
261 if (OCTEON_CN23XX_PF(oct)) { in lio_get_link_ksettings()
269 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
281 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
285 oct->speed_setting = 25; in lio_get_link_ksettings()
288 if (oct->speed_setting == 10) { in lio_get_link_ksettings()
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| D | lio_vf_main.c | 70 static int octeon_device_init(struct octeon_device *oct);
73 static int lio_wait_for_oq_pkts(struct octeon_device *oct) in lio_wait_for_oq_pkts() argument
76 (struct octeon_device_priv *)oct->priv; in lio_wait_for_oq_pkts()
84 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { in lio_wait_for_oq_pkts()
85 if (!(oct->io_qmask.oq & BIT_ULL(i))) in lio_wait_for_oq_pkts()
87 pkt_cnt += octeon_droq_check_hw_for_pkts(oct->droq[i]); in lio_wait_for_oq_pkts()
103 * @oct: Pointer to Octeon device
105 static void pcierror_quiesce_device(struct octeon_device *oct) in pcierror_quiesce_device() argument
117 if (wait_for_pending_requests(oct)) in pcierror_quiesce_device()
118 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); in pcierror_quiesce_device()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeon_ep/ |
| D | octep_cn9k_pf.c | 43 static void cn93_dump_regs(struct octep_device *oct, int qno) in cn93_dump_regs() argument
45 struct device *dev = &oct->pdev->dev; in cn93_dump_regs()
50 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_DBELL(qno))); in cn93_dump_regs()
53 octep_read_csr64(oct, CN93_SDP_R_IN_CONTROL(qno))); in cn93_dump_regs()
56 octep_read_csr64(oct, CN93_SDP_R_IN_ENABLE(qno))); in cn93_dump_regs()
59 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_BADDR(qno))); in cn93_dump_regs()
62 octep_read_csr64(oct, CN93_SDP_R_IN_INSTR_RSIZE(qno))); in cn93_dump_regs()
65 octep_read_csr64(oct, CN93_SDP_R_IN_CNTS(qno))); in cn93_dump_regs()
68 octep_read_csr64(oct, CN93_SDP_R_IN_INT_LEVELS(qno))); in cn93_dump_regs()
71 octep_read_csr64(oct, CN93_SDP_R_IN_PKT_CNT(qno))); in cn93_dump_regs()
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| D | octep_main.c | 38 * @oct: Octeon device private data structure.
48 static int octep_alloc_ioq_vectors(struct octep_device *oct) in octep_alloc_ioq_vectors() argument
53 for (i = 0; i < oct->num_oqs; i++) { in octep_alloc_ioq_vectors()
54 oct->ioq_vector[i] = vzalloc(sizeof(*oct->ioq_vector[i])); in octep_alloc_ioq_vectors()
55 if (!oct->ioq_vector[i]) in octep_alloc_ioq_vectors()
58 ioq_vector = oct->ioq_vector[i]; in octep_alloc_ioq_vectors()
59 ioq_vector->iq = oct->iq[i]; in octep_alloc_ioq_vectors()
60 ioq_vector->oq = oct->oq[i]; in octep_alloc_ioq_vectors()
61 ioq_vector->octep_dev = oct; in octep_alloc_ioq_vectors()
64 dev_info(&oct->pdev->dev, "Allocated %d IOQ vectors\n", oct->num_oqs); in octep_alloc_ioq_vectors()
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