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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - Asynchronous SRAM-like memories and ASICs
17 - Asynchronous, synchronous, and page mode burst NOR flash
18 - NAND flash
19 - Pseudo-SRAM devices
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dti,gpmc-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments GPMC NAND Flash controller.
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
14 GPMC NAND controller/Flash is represented as a child of the
20 - enum:
21 - ti,am64-nand
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/onenand/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 tristate "OneNAND on OMAP2/OMAP3 support"
30 Support for a OneNAND flash device connected to an OMAP2/OMAP3 SoC
45 One Block of the NAND Flash Array memory is reserved as
46 a One-Time Programmable Block memory area.
47 Also, 1st Block of NAND Flash Array can be used as OTP.
50 operations as any other NAND Flash Array memory block.
53 OTP block is fully-guaranteed to be a valid block.
59 Since the device is equipped with two DataRAMs, and two-plane NAND
/kernel/linux/linux-6.6/drivers/mtd/nand/onenand/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 tristate "OneNAND on OMAP2/OMAP3 support"
31 Support for a OneNAND flash device connected to an OMAP2/OMAP3 SoC
47 One Block of the NAND Flash Array memory is reserved as
48 a One-Time Programmable Block memory area.
49 Also, 1st Block of NAND Flash Array can be used as OTP.
52 operations as any other NAND Flash Array memory block.
55 OTP block is fully-guaranteed to be a valid block.
61 Since the device is equipped with two DataRAMs, and two-plane NAND
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dgpmc-nand.txt3 GPMC connected NAND (found on OMAP boards) are represented as child nodes of
4 the GPMC controller with a name of "nand".
7 explained in a separate documents - please refer to
8 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
10 For NAND specific properties such as ECC modes or bus width, please refer to
11 Documentation/devicetree/bindings/mtd/nand-controller.yaml
16 - compatible: "ti,omap2-nand"
17 - reg: range id (CS number), base offset and length of the
18 NAND I/O space
19 - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount.
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap3430-sdp.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3";
20 clock-frequency = <2600000>;
32 vmmc-supply = <&vmmc1>;
33 vqmmc-supply = <&vsim>;
35 * S6-3 must be in ON position for 8 bit mode to function
38 bus-width = <8>;
51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */
[all …]
Domap3-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "omap3-evm-common.dtsi"
9 #include "omap3-evm-processor-common.dtsi"
13 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
17 pinctrl-names = "default";
18 pinctrl-0 = <&hsusb2_2_pins>;
21 pinctrl-single,pins = <
33 pinctrl-single,pins = <
[all …]
Domap3-evm-37xx.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "omap3-evm-common.dtsi"
9 #include "omap3-evm-processor-common.dtsi"
13 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
17 pinctrl-names = "default";
18 pinctrl-0 = <&hsusb2_2_pins>;
21 pinctrl-single,pins = <
33 pinctrl-single,pins = <
[all …]
Domap3-igep.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
19 stdout-path = &uart3;
23 compatible = "ti,omap-twl4030";
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
38 pinctrl-single,pins = <
45 pinctrl-single,pins = <
[all …]
Ddm8148-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814";
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
27 phy-mode = "rgmii-id";
[all …]
Ddra62x-j5eco-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814";
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
27 phy-mode = "rgmii-id";
[all …]
Dam335x-chilisom.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "grinn,am335x-chilisom", "ti,am33xx";
15 cpu0-supply = <&dcdc2_reg>;
26 pinctrl-names = "default";
29 pinctrl-single,pins = <
36 pinctrl-single,pins = <
57 pinctrl-names = "default";
58 pinctrl-0 = <&i2c0_pins>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap3430-sdp.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
11 compatible = "ti,omap3430-sdp", "ti,omap3430", "ti,omap3";
20 clock-frequency = <2600000>;
32 vmmc-supply = <&vmmc1>;
33 vqmmc-supply = <&vsim>;
35 * S6-3 must be in ON position for 8 bit mode to function
38 bus-width = <8>;
51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */
[all …]
Domap3-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "omap3-evm-common.dtsi"
9 #include "omap3-evm-processor-common.dtsi"
13 compatible = "ti,omap3-evm", "ti,omap3430", "ti,omap3";
17 pinctrl-names = "default";
18 pinctrl-0 = <&hsusb2_2_pins>;
20 ehci_phy_pins: ehci-phy-pins {
21 pinctrl-single,pins = <
[all …]
Domap3-evm-37xx.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "omap3-evm-common.dtsi"
9 #include "omap3-evm-processor-common.dtsi"
13 compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3";
17 pinctrl-names = "default";
18 pinctrl-0 = <&hsusb2_2_pins>;
20 ehci_phy_pins: ehci-phy-pins {
21 pinctrl-single,pins = <
[all …]
Domap3-igep.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
19 stdout-path = &uart3;
23 compatible = "ti,omap-twl4030";
28 vdd33: regulator-vdd33 {
29 compatible = "regulator-fixed";
30 regulator-name = "vdd33";
31 regulator-always-on;
37 gpmc_pins: gpmc-pins {
38 pinctrl-single,pins = <
[all …]
Ddm8148-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dm8148-evm", "ti,dm8148", "ti,dm814";
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
27 phy-mode = "rgmii-id";
[all …]
Ddra62x-j5eco-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
5 #include <dt-bindings/interrupt-controller/irq.h>
9 compatible = "ti,dra62x-j5eco-evm", "ti,dra62x", "ti,dm8148", "ti,dm814";
18 compatible = "regulator-fixed";
19 regulator-name = "vmmcsd_fixed";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
26 phy-handle = <&ethphy0>;
27 phy-mode = "rgmii-id";
[all …]
Dam335x-chilisom.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Jablotron s.r.o. -- https://www.jablotron.com/
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "grinn,am335x-chilisom", "ti,am33xx";
15 cpu0-supply = <&dcdc2_reg>;
26 pinctrl-names = "default";
28 i2c0_pins: i2c0-pins {
29 pinctrl-single,pins = <
35 nandflash_pins: nandflash-pins {
36 pinctrl-single,pins = <
[all …]
Dlogicpd-torpedo-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/input/input.h>
7 stdout-path = &uart1;
12 cpu0-supply = <&vcc>;
22 compatible = "gpio-leds";
23 led-user0 {
26 linux,default-trigger = "none";
32 #clock-cells = <0>;
33 compatible = "fixed-clock";
34 clock-frequency = <26000000>;
[all …]
/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
4 obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
6 obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
7 obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
8 obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
9 obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o
10 obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o
11 obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
12 obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Raw/Parallel NAND Device Support"
8 NAND flash devices. For further information see
9 <http://www.linux-mtd.infradead.org/doc/nand.html>.
13 comment "Raw/parallel NAND flash controllers"
19 tristate "Denali NAND controller on Intel Moorestown"
23 Enable the driver for NAND flash on Intel Moorestown, using the
24 Denali NAND controller core.
27 tristate "Denali NAND controller as a DT device"
31 Enable the driver for NAND flash on platforms using a Denali NAND
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
4 obj-$(CONFIG_MTD_NAND_ECC_SW_HAMMING) += nand_ecc.o
5 nand-$(CONFIG_MTD_NAND_ECC_SW_BCH) += nand_bch.o
6 obj-$(CONFIG_MTD_SM_COMMON) += sm_common.o
8 obj-$(CONFIG_MTD_NAND_CAFE) += cafe_nand.o
9 obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
10 obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
11 obj-$(CONFIG_MTD_NAND_DENALI_PCI) += denali_pci.o
12 obj-$(CONFIG_MTD_NAND_DENALI_DT) += denali_dt.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 bool "NAND ECC Smart Media byte order"
14 tristate "Raw/Parallel NAND Device Support"
20 NAND flash devices. For further information see
21 <http://www.linux-mtd.infradead.org/doc/nand.html>.
32 ECC codes. They are used with NAND devices requiring more than 1 bit
35 comment "Raw/parallel NAND flash controllers"
41 tristate "Denali NAND controller on Intel Moorestown"
45 Enable the driver for NAND flash on Intel Moorestown, using the
46 Denali NAND controller core.
[all …]
/kernel/linux/linux-6.6/include/linux/platform_data/
Dmtd-nand-omap2.h1 /* SPDX-License-Identifier: GPL-2.0-only */
23 * 1-bit ECC: calculation and correction by SW
29 * 1-bit ECC: calculation by GPMC, Error detection by Software
33 /* 4-bit ECC calculation by GPMC, Error detection by Software */
35 /* 4-bit ECC calculation by GPMC, Error detection by ELM */
37 /* 8-bit ECC calculation by GPMC, Error detection by Software */
39 /* 8-bit ECC calculation by GPMC, Error detection by ELM */
41 /* 16-bit ECC calculation by GPMC, Error detection by ELM */
67 { .compatible = "ti,omap2-nand", },
68 { .compatible = "ti,am64-nand", },

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