Searched +full:omap4 +full:- +full:dsp (Results 1 – 25 of 66) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP4+ Remoteproc Devices 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: OMAP4+ Remoteproc Devices 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/ |
| D | ti,omap-iommu.txt | 4 - compatible : Should be one of, 5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances 6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances 7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances 8 "ti,dra7-iommu" for DRA7xx IOMMU instances 9 - ti,hwmods : Name of the hwmod associated with the IOMMU instance 10 - reg : Address space for the configuration registers 11 - interrupts : Interrupt specifier for the IOMMU instance 12 - #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices, 19 - ti,#tlb-entries : Number of entries in the translation look-aside buffer. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iommu/ |
| D | ti,omap-iommu.txt | 4 - compatible : Should be one of, 5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances 6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances 7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances 8 "ti,dra7-iommu" for DRA7xx IOMMU instances 9 - ti,hwmods : Name of the hwmod associated with the IOMMU instance 10 - reg : Address space for the configuration registers 11 - interrupts : Interrupt specifier for the IOMMU instance 12 - #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices, 19 - ti,#tlb-entries : Number of entries in the translation look-aside buffer. [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/bus/ti-sysc.h> 7 #include <dt-bindings/clock/omap4.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/omap.h> 11 #include <dt-bindings/clock/omap4.h> 14 compatible = "ti,omap4430", "ti,omap4"; 15 interrupt-parent = <&wakeupgen>; [all …]
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| D | omap4-l4-abe.dtsi | 2 compatible = "ti,omap4-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP4_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| D | omap5-l4-abe.dtsi | 2 compatible = "ti,omap5-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP5_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/omap.h> 12 #include <dt-bindings/clock/omap5.h> 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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| D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; [all …]
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| D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | omap4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/bus/ti-sysc.h> 7 #include <dt-bindings/clock/omap4.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/omap.h> 11 #include <dt-bindings/clock/omap4.h> 14 compatible = "ti,omap4430", "ti,omap4"; 15 interrupt-parent = <&wakeupgen>; [all …]
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| D | omap4-l4-abe.dtsi | 2 compatible = "ti,omap4-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP4_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| D | omap5-l4-abe.dtsi | 2 compatible = "ti,omap5-l4-abe", "simple-pm-bus"; 5 reg-names = "la", "ap"; 6 power-domains = <&prm_abe>; 7 /* OMAP5_L4_ABE_CLKCTRL is read-only */ 8 #address-cells = <1>; 9 #size-cells = <1>; 13 compatible = "simple-pm-bus"; 14 #address-cells = <1>; 15 #size-cells = <1>; 89 target-module@22000 { /* 0x40122000, ap 2 02.0 */ [all …]
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| D | omap5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/omap.h> 12 #include <dt-bindings/clock/omap5.h> 15 #address-cells = <2>; 16 #size-cells = <2>; [all …]
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| D | dra74x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 16 compatible = "arm,cortex-a15"; 18 operating-points-v2 = <&cpu0_opp_table>; 21 clock-names = "cpu"; 23 clock-latency = <300000>; /* From omap-cpufreq driver */ 26 #cooling-cells = <2>; /* min followed by max */ 28 vbb-supply = <&abb_mpu>; 40 compatible = "arm,cortex-a15-pmu"; [all …]
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| D | dra7xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 atl_clkin0_ck: clock-atl-clkin0 { 9 #clock-cells = <0>; 10 compatible = "ti,dra7-atl-clock"; 11 clock-output-names = "atl_clkin0_ck"; 15 atl_clkin1_ck: clock-atl-clkin1 { 16 #clock-cells = <0>; 17 compatible = "ti,dra7-atl-clock"; 18 clock-output-names = "atl_clkin1_ck"; 22 atl_clkin2_ck: clock-atl-clkin2 { [all …]
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| D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5 * Based on "omap4.dtsi" 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 12 Support for remote processors (such as DSP coprocessors). These 41 This can be either built-in or a loadable module. 62 and DSP on OMAP4) via the remote processor framework. 64 Currently only supported on OMAP4. 67 use-cases to run on your platform (multimedia codecs are 68 offloaded to remote DSP processors using this framework). 92 Required for Suspend-to-RAM on AM33xx and AM43xx SoCs. Also needed 98 tristate "DA8xx/OMAP-L13x remoteproc support" 102 Say y here to support DA8xx/OMAP-L13x remote processors via the [all …]
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| /kernel/linux/linux-6.6/drivers/remoteproc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 12 Support for remote processors (such as DSP coprocessors). These 38 tristate "i.MX DSP remoteproc support" 43 Say y here to support iMX's DSP remote processors via the remote 54 This can be either built-in or a loadable module. 75 and DSP on OMAP4) via the remote processor framework. 77 Currently only supported on OMAP4. 80 use-cases to run on your platform (multimedia codecs are 81 offloaded to remote DSP processors using this framework). 105 Required for Suspend-to-RAM on AM33xx and AM43xx SoCs. Also needed [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | ti,timer-dm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI dual-mode timer 10 - Tony Lindgren <tony@atomide.com> 13 The TI dual-mode timer is a general purpose timer with PWM capabilities. 18 - items: 19 - enum: 20 - ti,am335x-timer [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 35 lines can also be routed to different processor sub-systems on DRA7xx as they 49 within a SoC. The sub-mailboxes (actual communication channels) are 56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt 59 phandle to the intended sub-mailbox child node to be used for communication. 60 The equivalent "mbox-names" property value can be used to give a name to the [all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | cm2xxx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. 6 * Copyright (C) 2007-2010 Nokia Corporation 10 * other. The CM modules/instances on OMAP4 are quite different, so 16 #include "prcm-common.h" 30 /* OMAP2-specific register offsets */ 53 extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 atf-sram@0 { 20 tifs-sram@1f0000 { 24 l3cache-sram@200000 { 29 gic500: interrupt-controller@1800000 { 30 compatible = "arm,gic-v3"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/ |
| D | omap-mailbox.txt | 25 routed to different processor sub-systems on DRA7xx as they are routed through 35 a SoC. The sub-mailboxes are represented as child nodes of this parent node. 38 -------------------- 39 - compatible: Should be one of the following, 40 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs 41 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs 42 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx, 44 "ti,am654-mailbox" for K3 AM65x and J721E SoCs 45 - reg: Contains the mailbox register address range (base 47 - interrupts: Contains the interrupt information for the mailbox [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-omap2/ |
| D | cm2xxx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. 6 * Copyright (C) 2007-2010 Nokia Corporation 10 * other. The CM modules/instances on OMAP4 are quite different, so 16 #include "prcm-common.h" 30 /* OMAP2-specific register offsets */ 60 extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
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