Searched +full:one +full:- +full:time +full:- +full:programmable (Results 1 – 25 of 354) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/driver-api/ |
| D | ptp.rst | 1 .. SPDX-License-Identifier: GPL-2.0 18 - Set time 19 - Get time 20 - Shift the clock by a given offset atomically 21 - Adjust clock frequency 24 - Time stamp external events 25 - Period output signals configurable from user space 26 - Low Pass Filter (LPF) access from user space 27 - Synchronization of the Linux system time via the PPS subsystem 36 driver of asynchronous events (alarms and external time stamps) via [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | ptp.rst | 1 .. SPDX-License-Identifier: GPL-2.0 18 - Set time 19 - Get time 20 - Shift the clock by a given offset atomically 21 - Adjust clock frequency 24 - Time stamp external events 25 - Period output signals configurable from user space 26 - Low Pass Filter (LPF) access from user space 27 - Synchronization of the Linux system time via the PPS subsystem 36 driver of asynchronous events (alarms and external time stamps) via [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/dac/ |
| D | ad5758.txt | 4 - compatible: Must be "adi,ad5758" 5 - reg: SPI chip select number for the device 6 - spi-max-frequency: Max SPI frequency to use (< 50000000) 7 - spi-cpha: is the only mode that is supported 11 - adi,dc-dc-mode: Mode of operation of the dc-to-dc converter 18 Programmable Power Control (PPC) 19 In this mode, the VDPC+ voltage is user-programmable to 24 current or voltage output at the VIOUT pin. Only one mode 25 can be enabled at any one time. 32 Depending on the selected output mode (voltage or current) one of the [all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | ptp_clock_kernel.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 31 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp 39 * struct ptp_clock_info - describes a PTP hardware clock 46 * @n_alarm: The number of programmable alarms. 47 * @n_ext_ts: The number of external time stamp channels. 48 * @n_per_out: The number of programmable periodic signals. 49 * @n_pins: The number of programmable pins. 52 * programmable pins is nonzero, then drivers must 71 * @adjtime: Shifts the time of the hardware clock. 74 * @gettime64: Reads the current time from the hardware clock. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/dac/ |
| D | adi,ad5758.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <Michael.Hennerich@analog.com> 19 spi-cpha: true 21 adi,dc-dc-mode: 25 Mode of operation of the dc-to-dc converter 31 Programmable Power Control (PPC) 32 In this mode, the VDPC+ voltage is user-programmable to a fixed level 36 voltage output at the VIOUT pin. Only one mode can be enabled at [all …]
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| /kernel/linux/linux-5.10/Documentation/ABI/testing/ |
| D | sysfs-ptp | 40 This file contains the number of periodic or one shot 54 This file contains the number of programmable periodic 61 This file contains the number of programmable pins 68 This directory contains one file for each programmable 90 This write-only file enables or disables external 108 This write-only file enables or disables periodic 110 integers into the file: channel index, start time 111 seconds, start time nanoseconds, period seconds, and 119 This write-only file enables or disables delivery of
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 TI Programmable Real-Time Unit and Industrial Communication Subsystem 11 - Suman Anna <s-anna@ti.com> 15 The Programmable Real-Time Unit and Industrial Communication Subsystem 16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC 18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and 22 The programmable nature of the PRUs provide flexibility to implement custom [all …]
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| /kernel/linux/linux-6.6/drivers/mtd/chips/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 support any device that is CFI-compliant, you need to enable this 18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" 22 This option enables JEDEC-style probing of flash chips which are not 24 CFI-targeted flash drivers for any chips which are identified which 26 covers most AMD/Fujitsu-compatible chips and also non-CFI 53 are expected to be wired to the CPU in 'host-endian' form. 85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY 92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY 99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/chips/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 support any device that is CFI-compliant, you need to enable this 18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" 22 This option enables JEDEC-style probing of flash chips which are not 24 CFI-targeted flash drivers for any chips which are identified which 26 covers most AMD/Fujitsu-compatible chips and also non-CFI 53 are expected to be wired to the CPU in 'host-endian' form. 85 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY 92 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY 99 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY [all …]
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | lm78.rst | 6 * National Semiconductor LM78 / LM78-J 10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 28 - Frodo Looijaard <frodol@dds.nl> 29 - Jean Delvare <jdelvare@suse.de> 32 ----------- 34 This driver implements support for the National Semiconductor LM78, LM78-J 38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line, 42 The LM7* implements one temperature sensor, three fan rotation speed sensors, 49 this case, alarms are issued during all the time when the actual temperature [all …]
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| D | lm87.rst | 10 Addresses scanned: I2C 0x2c - 0x2e 18 Addresses scanned: I2C 0x2c - 0x2e 24 - Frodo Looijaard <frodol@dds.nl>, 25 - Philip Edelbrock <phil@netroedge.com>, 26 - Mark Studebaker <mdsxyz123@yahoo.com>, 27 - Stephen Rousset <stephen.rousset@rocketlogix.com>, 28 - Dan Eaton <dan.eaton@rocketlogix.com>, 29 - Jean Delvare <jdelvare@suse.de>, 30 - Original 2.6 port Jeff Oliver 33 ----------- [all …]
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| D | pc87360.rst | 22 ----------------- 27 - 0: None 28 - **1**: Forcibly enable internal voltage and temperature channels, 30 - 2: Forcibly enable all voltage and temperature channels, except in9 31 - 3: Forcibly enable all voltage and temperature channels, including in9 38 so they can't be used at the same time. 42 ----------- 56 PC87360 - 2 2 - 0xE1 57 PC87363 - 2 2 - 0xE8 58 PC87364 - 3 3 - 0xE4 [all …]
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| /kernel/linux/linux-6.6/Documentation/hwmon/ |
| D | lm78.rst | 6 * National Semiconductor LM78 / LM78-J 10 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 20 Addresses scanned: I2C 0x28 - 0x2f, ISA 0x290 (8 I/O ports) 28 - Frodo Looijaard <frodol@dds.nl> 29 - Jean Delvare <jdelvare@suse.de> 32 ----------- 34 This driver implements support for the National Semiconductor LM78, LM78-J 38 the LM78 and LM78-J are exactly identical. The LM79 has one more VID line, 42 The LM7* implements one temperature sensor, three fan rotation speed sensors, 49 this case, alarms are issued during all the time when the actual temperature [all …]
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| D | lm87.rst | 10 Addresses scanned: I2C 0x2c - 0x2e 18 Addresses scanned: I2C 0x2c - 0x2e 24 - Frodo Looijaard <frodol@dds.nl>, 25 - Philip Edelbrock <phil@netroedge.com>, 26 - Mark Studebaker <mdsxyz123@yahoo.com>, 27 - Stephen Rousset <stephen.rousset@rocketlogix.com>, 28 - Dan Eaton <dan.eaton@rocketlogix.com>, 29 - Jean Delvare <jdelvare@suse.de>, 30 - Original 2.6 port Jeff Oliver 33 ----------- [all …]
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| D | pc87360.rst | 22 ----------------- 27 - 0: None 28 - **1**: Forcibly enable internal voltage and temperature channels, 30 - 2: Forcibly enable all voltage and temperature channels, except in9 31 - 3: Forcibly enable all voltage and temperature channels, including in9 38 so they can't be used at the same time. 42 ----------- 56 PC87360 - 2 2 - 0xE1 57 PC87363 - 2 2 - 0xE8 58 PC87364 - 3 3 - 0xE4 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/ |
| D | leds-lm3532.txt | 1 * Texas Instruments - lm3532 White LED driver with ambient light sensing 4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is 5 programmable over an I2C-compatible interface and has independent 11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear 13 1000:1 dimming ratio with programmable fade in and fade out settings. 16 - compatible : "ti,lm3532" 17 - reg : I2C slave address 18 - #address-cells : 1 19 - #size-cells : 0 22 - enable-gpios : gpio pin to enable (active high)/disable the device. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | leds-lm3532.txt | 1 * Texas Instruments - lm3532 White LED driver with ambient light sensing 4 The LM3532 provides the 3 high-voltage, low-side current sinks. The device is 5 programmable over an I2C-compatible interface and has independent 11 each with 32 internal voltage setting resistors, 8-bit logarithmic and linear 13 1000:1 dimming ratio with programmable fade in and fade out settings. 16 - compatible : "ti,lm3532" 17 - reg : I2C slave address 18 - #address-cells : 1 19 - #size-cells : 0 22 - enable-gpios : gpio pin to enable (active high)/disable the device. [all …]
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| /kernel/linux/linux-6.6/include/linux/ |
| D | pruss_driver.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * PRU-ICSS sub-system specific definitions 5 * Copyright (C) 2014-2020 Texas Instruments Incorporated - http://www.ti.com/ 6 * Suman Anna <s-anna@ti.com> 18 * enum pruss_gp_mux_sel - PRUSS GPI/O Mux modes for the 23 * values are interchanged. Also, this bit-field does not exist on 36 * enum pruss_gpi_mode - PRUSS GPI configuration modes, used 48 * enum pru_type - PRU core type identifier 50 * @PRU_TYPE_PRU: Programmable Real-time Unit 51 * @PRU_TYPE_RTU: Auxiliary Programmable Real-Time Unit [all …]
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| D | ptp_clock_kernel.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 19 * struct ptp_clock_request - request PTP clock event 47 * struct ptp_system_timestamp - system time corresponding to a PHC timestamp 57 * struct ptp_clock_info - describes a PTP hardware clock 64 * @n_alarm: The number of programmable alarms. 65 * @n_ext_ts: The number of external time stamp channels. 66 * @n_per_out: The number of programmable periodic signals. 67 * @n_pins: The number of programmable pins. 70 * programmable pins is nonzero, then drivers must 89 * @adjtime: Shifts the time of the hardware clock. [all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-ptp | 41 Write integer to re-configure it. 47 This file contains the number of periodic or one shot 61 This file contains the number of programmable periodic 68 This file contains the number of programmable pins 88 This directory contains one file for each programmable 110 This write-only file enables or disables external 128 This write-only file enables or disables periodic 130 integers into the file: channel index, start time 131 seconds, start time nanoseconds, period seconds, and 139 This write-only file enables or disables delivery of
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/ti/ |
| D | ti,pruss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 TI Programmable Real-Time Unit and Industrial Communication Subsystem 11 - Suman Anna <s-anna@ti.com> 15 The Programmable Real-Time Unit and Industrial Communication Subsystem 16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x, 17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC 18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and 22 The programmable nature of the PRUs provide flexibility to implement custom [all …]
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| /kernel/linux/linux-6.6/Documentation/watchdog/ |
| D | mlx-wdt.rst | 11 Mellanox watchdog device is implemented in a programmable logic device. 19 Get time-left isn't supported 23 a user-defined timeout. 25 Get time-left is supported. 38 Old systems still have only one main watchdog. 54 This mlx-wdt driver supports both HW watchdog implementations. 58 Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux), 61 version - type1 or type2. 66 Programmable logic device registers have little-endian order.
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| /kernel/linux/linux-5.10/Documentation/watchdog/ |
| D | mlx-wdt.rst | 11 Mellanox watchdog device is implemented in a programmable logic device. 19 Get time-left isn't supported 23 a user-defined timeout. 25 Get time-left is supported. 38 Old systems still have only one main watchdog. 54 This mlx-wdt driver supports both HW watchdog implementations. 58 Mellanox watchdog device, identity name (mlx-wdt-main or mlx-wdt-aux), 61 version - type1 or type2. 66 Programmable logic device registers have little-endian order.
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| /kernel/linux/linux-6.6/drivers/nvmem/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 37 calibration data required for the PCIe or the USB-C PHY. 40 be called nvmem-apple-efuses. 43 tristate "Broadcom On-Chip OTP Controller support" 52 will be called nvmem-bcm-ocotp. 68 i.MX SoCs, providing access to 4 Kbits of programmable 72 will be called nvmem-imx-iim. 75 tristate "i.MX 6/7/8 On-Chip OTP Controller support" 79 This is a driver for the On-Chip OTP Controller (OCOTP) available on 80 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable [all …]
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| /kernel/linux/linux-5.10/drivers/nvmem/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 29 i.MX SoCs, providing access to 4 Kbits of programmable 33 will be called nvmem-imx-iim. 36 tristate "i.MX 6/7/8 On-Chip OTP Controller support" 40 This is a driver for the On-Chip OTP Controller (OCOTP) available on 41 i.MX6 SoCs, providing access to 4 Kbits of one-time programmable 45 will be called nvmem-imx-ocotp. 48 tristate "i.MX8 SCU On-Chip OTP Controller support" 52 This is a driver for the SCU On-Chip OTP Controller (OCOTP) 88 tristate "Freescale MXS On-Chip OTP Memory Support" [all …]
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