| /kernel/linux/linux-5.10/drivers/w1/slaves/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire slaves configuration
6 menu "1-wire Slaves"
11 Say Y here if you want to connect 1-wire thermal sensors to your
12 wire.
17 Say Y here if you want to connect 1-wire
18 simple 64bit memory rom(ds2401/ds2411/ds1990*) to your wire.
23 Say Y or M here if you want to use a DS2405 1-wire
24 single-channel addressable switch.
25 This device can also work as a single-channel
[all …]
|
| /kernel/linux/linux-6.6/drivers/w1/slaves/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # 1-wire slaves configuration
6 menu "1-wire Slaves"
11 Say Y here if you want to connect 1-wire thermal sensors to your
12 wire.
17 Say Y here if you want to connect 1-wire
18 simple 64bit memory rom(ds2401/ds2411/ds1990*) to your wire.
23 Say Y or M here if you want to use a DS2405 1-wire
24 single-channel addressable switch.
25 This device can also work as a single-channel
[all …]
|
| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | motorola-cpcap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
186 #define CPCAP_REG_OWDC 0x0eb0 /* One Wire Device Control */
212 #define CPCAP_REG_OW1C 0x1200 /* One Wire 1 Command */
213 #define CPCAP_REG_OW1D 0x1204 /* One Wire 1 Data */
214 #define CPCAP_REG_OW1I 0x1208 /* One Wire 1 Interrupt */
215 #define CPCAP_REG_OW1IE 0x120c /* One Wire 1 Interrupt Enable */
217 #define CPCAP_REG_OW1 0x1214 /* One Wire 1 Control */
219 #define CPCAP_REG_OW2C 0x1220 /* One Wire 2 Command */
220 #define CPCAP_REG_OW2D 0x1224 /* One Wire 2 Data */
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | motorola-cpcap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2007-2009 Motorola, Inc.
186 #define CPCAP_REG_OWDC 0x0eb0 /* One Wire Device Control */
212 #define CPCAP_REG_OW1C 0x1200 /* One Wire 1 Command */
213 #define CPCAP_REG_OW1D 0x1204 /* One Wire 1 Data */
214 #define CPCAP_REG_OW1I 0x1208 /* One Wire 1 Interrupt */
215 #define CPCAP_REG_OW1IE 0x120c /* One Wire 1 Interrupt Enable */
217 #define CPCAP_REG_OW1 0x1214 /* One Wire 1 Control */
219 #define CPCAP_REG_OW2C 0x1220 /* One Wire 2 Command */
220 #define CPCAP_REG_OW2D 0x1224 /* One Wire 2 Data */
[all …]
|
| /kernel/linux/linux-6.6/Documentation/peci/ |
| D | peci.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
13 controller is acting as a PECI originator and the processor - as
15 PECI can be used in both single processor and multiple-processor based
24 PECI Wire
25 ---------
27 PECI Wire interface uses a single wire for self-clocking and data
28 transfer. It does not require any additional control lines - the
29 physical layer is a self-clocked one-wire bus signal that begins each
32 value is logic '0' or logic '1'. PECI Wire also includes variable data
35 For PECI Wire, each processor package will utilize unique, fixed
[all …]
|
| /kernel/linux/linux-5.10/drivers/w1/masters/ |
| D | sgi_w1.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * sgi_w1.c - w1 master driver for one wire support in SGI ASICs
13 #include <linux/platform_data/sgi-w1.h>
41 * reset the device on the One Wire interface
49 writel(MCR_PACK(520, 65), dev->mcr); in sgi_w1_reset_bus()
50 ret = sgi_w1_wait(dev->mcr); in sgi_w1_reset_bus()
56 * this is the low level routine to read/write a bit on the One Wire
66 writel(MCR_PACK(6, 13), dev->mcr); in sgi_w1_touch_bit()
68 writel(MCR_PACK(80, 30), dev->mcr); in sgi_w1_touch_bit()
70 ret = sgi_w1_wait(dev->mcr); in sgi_w1_touch_bit()
[all …]
|
| D | mxc_w1.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
81 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
|
| /kernel/linux/linux-6.6/drivers/w1/masters/ |
| D | sgi_w1.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * sgi_w1.c - w1 master driver for one wire support in SGI ASICs
13 #include <linux/platform_data/sgi-w1.h>
41 * reset the device on the One Wire interface
49 writel(MCR_PACK(520, 65), dev->mcr); in sgi_w1_reset_bus()
50 ret = sgi_w1_wait(dev->mcr); in sgi_w1_reset_bus()
56 * this is the low level routine to read/write a bit on the One Wire
66 writel(MCR_PACK(6, 13), dev->mcr); in sgi_w1_touch_bit()
68 writel(MCR_PACK(80, 30), dev->mcr); in sgi_w1_touch_bit()
70 ret = sgi_w1_wait(dev->mcr); in sgi_w1_touch_bit()
[all …]
|
| D | mxc_w1.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
55 /* PST bit is valid after the RPP bit is self-cleared */ in mxc_w1_ds2_reset_bus()
64 * this is the low level routine to read/write a bit on the One Wire
73 writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
81 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_touch_bit()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | awinic,aw8738.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephan Gerhold <stephan@gerhold.net>
14 (set using one-wire pulse control). The mode configures the speaker-guard
18 - $ref: dai-common.yaml#
24 mode-gpios:
26 GPIO used for one-wire pulse control. The pin is typically called SHDN
27 (active-low), but this is misleading since it is actually more than
32 description: Operation mode (number of pulses for one-wire pulse control)
[all …]
|
| D | mt6359.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eason Yen <eason.yen@mediatek.com>
11 - Jiaxin Yu <jiaxin.yu@mediatek.com>
12 - Shane Chien <shane.chien@mediatek.com>
20 mediatek,dmic-mode:
24 signal. 0 means two wires, 1 means one wire. Default value is 0.
26 - 0 # two wires
27 - 1 # one wire
[all …]
|
| /kernel/linux/linux-6.6/Documentation/w1/ |
| D | w1-generic.rst | 2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
6 signal wire (plus ground, so two wires).
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
29 - sysfs entries for that w1 master are created
30 - the w1 bus is periodically searched for new slave devices
[all …]
|
| /kernel/linux/linux-5.10/Documentation/w1/ |
| D | w1-generic.rst | 2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
6 signal wire (plus ground, so two wires).
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
29 - sysfs entries for that w1 master are created
30 - the w1 bus is periodically searched for new slave devices
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/w1/ |
| D | omap-hdq.txt | 1 * OMAP HDQ One wire bus master controller
4 - compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
5 - reg : Address and length of the register set for the device
6 - interrupts : interrupt line.
7 - ti,hwmods : "hdq1w"
10 - ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
15 - From omap3.dtsi
17 compatible = "ti,omap3-1w";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/w1/ |
| D | omap-hdq.txt | 1 * OMAP HDQ One wire bus master controller
4 - compatible : should be "ti,omap3-1w" or "ti,am4372-hdq"
5 - reg : Address and length of the register set for the device
6 - interrupts : interrupt line.
7 - ti,hwmods : "hdq1w"
10 - ti,mode: should be "hdq": HDQ mode "1w": one-wire mode.
15 - From omap3.dtsi
17 compatible = "ti,omap3-1w";
|
| /kernel/linux/linux-5.10/Documentation/driver-api/gpio/ |
| D | intro.rst | 16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
17 and is described by all the files in this directory excepted gpio-legacy.txt.
18 - The legacy integer-based interface which is considered deprecated (but still
19 usable for compatibility reasons) is documented in gpio-legacy.txt.
21 The remainder of this document applies to the new descriptor-based interface.
22 gpio-legacy.txt contains the same information applied to the legacy
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
[all …]
|
| /kernel/linux/linux-6.6/Documentation/driver-api/gpio/ |
| D | intro.rst | 16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
48 - Output values are writable (high=1, low=0). Some chips also have
49 options about how that value is driven, so that for example only one
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | icpdas-lp8841-spi-rtc.txt | 1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
23 - There can be only one slave device.
25 - The spi slave node should claim the following flags which are
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | icpdas-lp8841-spi-rtc.txt | 1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
23 - There can be only one slave device.
25 - The spi slave node should claim the following flags which are
28 - spi-3wire: The master itself has only 3 wire. It cannor work in
[all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | w1.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * struct w1_reg_num - broken out slave device id
49 * struct w1_slave - holds a single slave device on the bus
51 * @owner: Points to the one wire "wire" kernel module.
84 * struct w1_bus_master - operations available on a bus master
92 * @touch_bit: the lowest-level function for devices that really support the
93 * 1-wire protocol.
94 * touch_bit(0) = write-0 cycle
95 * touch_bit(1) = write-1 / read cycle
111 * @reset_bus: long write-0 with a read for the presence pulse detection
[all …]
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | w1.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 * struct w1_reg_num - broken out slave device id
49 * struct w1_slave - holds a single slave device on the bus
51 * @owner: Points to the one wire "wire" kernel module.
84 * struct w1_bus_master - operations available on a bus master
92 * @touch_bit: the lowest-level function for devices that really support the
93 * 1-wire protocol.
94 * touch_bit(0) = write-0 cycle
95 * touch_bit(1) = write-1 / read cycle
111 * @reset_bus: long write-0 with a read for the presence pulse detection
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | mt6359.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eason Yen <eason.yen@mediatek.com>
11 - Jiaxin Yu <jiaxin.yu@mediatek.com>
12 - Shane Chien <shane.chien@mediatek.com>
20 mediatek,dmic-mode:
24 signal. 0 means two wires, 1 means one wire. Default value is 0.
26 - 0 # one wire
27 - 1 # two wires
[all …]
|
| /kernel/linux/linux-5.10/Documentation/i2c/ |
| D | summary.rst | 6 a protocol developed by Philips. It is a slow two-wire protocol (variable
12 e.g. TWI (Two Wire Interface), IIC.
14 The official I2C specification is the `"I2C-bus specification and user
15 manual" (UM10204) <https://www.nxp.com/docs/en/user-guide/UM10204.pdf>`_
35 one or more *master* chips and one or more *slave* chips.
37 .. kernel-figure:: i2c_bus.svg
38 :alt: Simple I2C bus with one master and 3 slaves
55 video-related chips.
58 I2C adapter, and drivers for your I2C devices (usually one driver for each
|
| /kernel/linux/linux-6.6/Documentation/i2c/ |
| D | summary.rst | 6 a protocol developed by Philips. It is a slow two-wire protocol (variable
12 e.g. TWI (Two Wire Interface), IIC.
14 The latest official I2C specification is the `"I2C-bus specification and user
16 published by NXP Semiconductors. However, you need to log-in to the site to
18 `here <https://web.archive.org/web/20210813122132/https://www.nxp.com/docs/en/user-guide/UM10204.pd…
37 one or more *master* chips and one or more *slave* chips.
39 .. kernel-figure:: i2c_bus.svg
40 :alt: Simple I2C bus with one master and 3 slaves
57 video-related chips.
60 I2C adapter, and drivers for your I2C devices (usually one driver for each
|
| /kernel/linux/linux-6.6/Documentation/hwmon/ |
| D | adt7411.rst | 17 -----------
22 The ADT7411 can use an I2C/SMBus compatible 2-wire interface or an
23 SPI-compatible 4-wire interface. It provides a 10-bit analog to digital
25 internal temperature sensor, but an external one can also be connected (one
26 loses 2 inputs then). There are high- and low-limit registers for all inputs.
30 sysfs-Interface
31 ---------------
35 in[1-8]_input analog 1-8 input
48 -----
|