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/kernel/linux/linux-6.6/arch/arc/kernel/
Dunaligned.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2012 Synopsys (www.synopsys.com)
6 * -Adapted (from .26 to .35)
7 * -original contribution by Tim.yao@amlogic.com
17 #define BE 1
18 #define FIRST_BYTE_16 "swap %1, %1\n swape %1, %1\n"
19 #define FIRST_BYTE_32 "swape %1, %1\n"
28 "1: ldb.ab %1, [%2, 1]\n" \
32 "3: mov %0, 1\n" \
37 " .long 1b, 3b\n" \
[all …]
/kernel/linux/linux-5.10/arch/arc/kernel/
Dunaligned.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2012 Synopsys (www.synopsys.com)
6 * -Adapted (from .26 to .35)
7 * -original contribution by Tim.yao@amlogic.com
17 #define BE 1
18 #define FIRST_BYTE_16 "swap %1, %1\n swape %1, %1\n"
19 #define FIRST_BYTE_32 "swape %1, %1\n"
28 "1: ldb.ab %1, [%2, 1]\n" \
32 "3: mov %0, 1\n" \
37 " .long 1b, 3b\n" \
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dvideodev2.h1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Copyright (C) 1999-2012 the contributors
23 * 1. Redistributions of source code must retain the above copyright
47 * All kernel-specific stuff were moved to media/v4l2-dev.h, so
66 #include <linux/v4l2-common.h>
67 #include <linux/v4l2-controls.h>
74 #define VIDEO_MAX_PLANES 8
80 /* Four-character-code (FOURCC) */
82 ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
83 #define v4l2_fourcc_be(a, b, c, d) (v4l2_fourcc(a, b, c, d) | (1U << 31))
[all …]
/kernel/linux/linux-5.10/include/uapi/drm/
Ddrm_fourcc.h39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
46 * format and data layout of the buffer, and should be the only way to describe
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
69 #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
72 #define DRM_FORMAT_BIG_ENDIAN (1U<<31) /* format is big endian instead of little endian */
78 #define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
80 /* 8 bpp Red */
81 #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dvideodev2.h1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Copyright (C) 1999-2012 the contributors
23 * 1. Redistributions of source code must retain the above copyright
47 * All kernel-specific stuff were moved to media/v4l2-dev.h, so
66 #include <linux/v4l2-common.h>
67 #include <linux/v4l2-controls.h>
74 #define VIDEO_MAX_PLANES 8
80 /* Four-character-code (FOURCC) */
82 ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24))
83 #define v4l2_fourcc_be(a, b, c, d) (v4l2_fourcc(a, b, c, d) | (1U << 31))
[all …]
Drkisp1-config.h1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) */
13 #define RKISP1_CIF_ISP_MODULE_DPCC (1U << 0)
15 #define RKISP1_CIF_ISP_MODULE_BLS (1U << 1)
16 /* Sensor De-gamma */
17 #define RKISP1_CIF_ISP_MODULE_SDG (1U << 2)
19 #define RKISP1_CIF_ISP_MODULE_HST (1U << 3)
21 #define RKISP1_CIF_ISP_MODULE_LSC (1U << 4)
23 #define RKISP1_CIF_ISP_MODULE_AWB_GAIN (1U << 5)
25 #define RKISP1_CIF_ISP_MODULE_FLT (1U << 6)
27 #define RKISP1_CIF_ISP_MODULE_BDM (1U << 7)
[all …]
/kernel/linux/linux-6.6/arch/arm/crypto/
Dblake2s-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
15 // load the words on-demand.
59 // Execute a quarter-round of BLAKE2s by mixing two columns or two diagonals.
61 // columns/diagonals. s0-s1 are the word offsets to the message words the first
62 // column/diagonal needs, and likewise s2-s3 for the second column/diagonal.
94 // a += b + m[blake2s_sigma[r][2*i + 1]];
100 // d = ror32(d ^ a, 8);
105 add \c0, \c0, \d0, ror#8
106 add \c1, \c1, \d1, ror#8
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/bpf/progs/
Diters.c1 // SPDX-License-Identifier: GPL-2.0
35 int *v, i = zero; /* obscure initial value of i */ in iter_err_unsafe_c_loop() local
40 while ((v = bpf_iter_num_next(&it))) { in iter_err_unsafe_c_loop()
63 "r4 = 1;" in iter_err_unsafe_asm_loop()
69 "r6 += 1;" in iter_err_unsafe_asm_loop()
97 int *v; in iter_while_loop() local
102 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop()
103 bpf_printk("ITER_BASIC: E1 VAL: v=%d", *v); in iter_while_loop()
115 int *v; in iter_while_loop_auto_cleanup() local
120 while ((v = bpf_iter_num_next(&it))) { in iter_while_loop_auto_cleanup()
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/kernel/linux/linux-6.6/include/uapi/drm/
Ddrm_fourcc.h39 * further describe the buffer's format - for example tiling or compression.
42 * ----------------
46 * format and data layout of the buffer, and should be the only way to describe
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
58 * may preserve meaning - such as number of planes - from the fourcc code,
62 * match only a single modifier. A modifier must not be a subset of layouts of
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
76 * - Kernel and user-space drivers: for drivers it's important that modifiers
80 * - Higher-level programs interfacing with KMS/GBM/EGL/Vulkan/etc: these users
93 * -----------------------
[all …]
/kernel/linux/linux-6.6/crypto/
Dblake2b_generic.c1 // SPDX-License-Identifier: (GPL-2.0-only OR Apache-2.0)
11 * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
12 * - OpenSSL license : https://www.openssl.org/source/license.html
13 * - Apache 2.0 : https://www.apache.org/licenses/LICENSE-2.0
26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dnand_ids.c1 // SPDX-License-Identifier: GPL-2.0-only
29 {"TC58NVG0S3E 1G 3.3V 8-bit",
31 SZ_2K, SZ_128, SZ_128K, 0, 8, 64, NAND_ECC_INFO(1, SZ_512), },
32 {"TC58NVG2S0F 4G 3.3V 8-bit",
34 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
35 {"TC58NVG2S0H 4G 3.3V 8-bit",
37 SZ_4K, SZ_512, SZ_256K, 0, 8, 256, NAND_ECC_INFO(8, SZ_512) },
38 {"TC58NVG3S0F 8G 3.3V 8-bit",
40 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
41 {"TC58NVG5D2 32G 3.3V 8-bit",
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/arm64/fp/
Dfpsimd-test.S1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2015-2019 ARM Limited.
9 // for x in `seq 1 NR_CPUS`; do fpsimd-test & pids=$pids\ $! ; done
15 #include "asm-offsets.h"
18 #define MAXVL_B (128 / 8)
21 ld1 {v\Vn\().2d}, [x\Xt]
25 st1 {v\Vn\().2d}, [x\Xt]
32 // All clobber x0-x2
58 add w2, w2, #(1 << 22)
59 subs w1, w1, #1
[all …]
/kernel/linux/linux-6.6/Documentation/hwmon/
Dadm1026.rst16 - Philip Pokorny <ppokorny@penguincomputing.com> for Penguin Computing
17 - Justin Thiessen <jthiessen@penguincomputing.com>
20 -----------------
22 * gpio_input: int array (min = 1, max = 17)
23 List of GPIO pins (0-16) to program as inputs
25 * gpio_output: int array (min = 1, max = 17)
26 List of GPIO pins (0-16) to program as outputs
28 * gpio_inverted: int array (min = 1, max = 17)
29 List of GPIO pins (0-16) to program as inverted
31 * gpio_normal: int array (min = 1, max = 17)
[all …]
/kernel/linux/linux-5.10/Documentation/hwmon/
Dadm1026.rst16 - Philip Pokorny <ppokorny@penguincomputing.com> for Penguin Computing
17 - Justin Thiessen <jthiessen@penguincomputing.com>
20 -----------------
22 * gpio_input: int array (min = 1, max = 17)
23 List of GPIO pins (0-16) to program as inputs
25 * gpio_output: int array (min = 1, max = 17)
26 List of GPIO pins (0-16) to program as outputs
28 * gpio_inverted: int array (min = 1, max = 17)
29 List of GPIO pins (0-16) to program as inverted
31 * gpio_normal: int array (min = 1, max = 17)
[all …]
/kernel/linux/linux-5.10/arch/x86/include/asm/
Dperf_event_p4.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * perf-MSRs are not shared and every thread has its
17 * own perf-MSRs set)
20 #define ARCH_P4_RESERVED_ESCR (2) /* IQ_ESCR(0,1) not always present */
21 #define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR)
25 #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
26 #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument
41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument
42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument
[all …]
Dsegment.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 ((((base) & _AC(0xff000000,ULL)) << (56-24)) | \
15 (((limit) & _AC(0x000f0000,ULL)) << (48-16)) | \
19 /* Simple and small GDT entries for booting only: */
24 #define __BOOT_CS (GDT_ENTRY_BOOT_CS*8)
25 #define __BOOT_DS (GDT_ENTRY_BOOT_DS*8)
26 #define __BOOT_TSS (GDT_ENTRY_BOOT_TSS*8)
35 * When running on Xen PV, the actual privilege level of the kernel is 1,
60 * The layout of the per-CPU GDT under Linux:
62 * 0 - null <=== cacheline #1
[all …]
/kernel/linux/linux-6.6/arch/x86/include/asm/
Dperf_event_p4.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 * perf-MSRs are not shared and every thread has its
17 * own perf-MSRs set)
20 #define ARCH_P4_RESERVED_ESCR (2) /* IQ_ESCR(0,1) not always present */
21 #define ARCH_P4_MAX_ESCR (ARCH_P4_TOTAL_ESCR - ARCH_P4_RESERVED_ESCR)
25 #define ARCH_P4_CNTRVAL_MASK ((1ULL << ARCH_P4_CNTRVAL_BITS) - 1)
26 #define ARCH_P4_UNFLAGGED_BIT ((1ULL) << (ARCH_P4_CNTRVAL_BITS - 1))
40 #define P4_ESCR_EVENT(v) ((v) << P4_ESCR_EVENT_SHIFT) argument
41 #define P4_ESCR_EMASK(v) ((v) << P4_ESCR_EVENTMASK_SHIFT) argument
42 #define P4_ESCR_TAG(v) ((v) << P4_ESCR_TAG_SHIFT) argument
[all …]
/kernel/linux/linux-5.10/arch/c6x/include/asm/
Dunaligned.h1 /* SPDX-License-Identifier: GPL-2.0-only */
23 return _p[0] | _p[1] << 8; in get_unaligned_le16()
29 return _p[0] << 8 | _p[1]; in get_unaligned_be16()
36 _p[1] = val >> 8; in put_unaligned_le16()
42 _p[0] = val >> 8; in put_unaligned_be16()
43 _p[1] = val; in put_unaligned_be16()
57 asm volatile (" stnw .d2t1 %0,*%1\n" in put_unaligned32()
64 asm volatile (" ldndw .d1t1 *%1,%0\n" in get_unaligned64()
72 asm volatile (" stndw .d2t1 %0,*%1\n" in put_unaligned64()
82 #define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p)) argument
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmarvell,xenon-sdhci.txt11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
17 - clocks:
22 - clock-names:
27 - reg:
28 * For "marvell,armada-3700-sdhci", two register areas.
31 Please follow the examples with compatible "marvell,armada-3700-sdhci"
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-sun6i-p2wi.c2 * P2WI (Push-Pull Two Wire Interface) bus driver.
4 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
10 * The P2WI controller looks like an SMBus controller which only supports byte
13 * - it supports only one slave device, and thus drop the address field
14 * - it adds a parity bit every 8bits of data
15 * - only one read access is required to read a byte (instead of a write
17 * - there's no Ack bit after each byte transfer
20 * devices (the only known device to support this interface is the AXP221
50 #define P2WI_CTRL_GLOBAL_INT_ENB BIT(1)
54 #define P2WI_CCR_SDA_OUT_DELAY(v) (((v) & 0x7) << 8) argument
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/altera/
Daltera_msgdmahw.h1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #define MSGDMA_DESC_CTL_GEN_SOP BIT(8)
42 /* Writing ‘1’ to the ‘go’ bit commits the entire descriptor into the
80 u32 rw_fill_level; /* bit 31:16 - write fill level
81 * bit 15:0 - read fill level
84 u32 rw_seq_num; /* bit 31:16 - write sequence number
85 * bit 15:0 - read sequence number
93 #define MSGDMA_CSR_STAT_DESC_BUF_EMPTY BIT(1)
100 #define MSGDMA_CSR_STAT_STOPPED_ON_EARLY BIT(8)
105 #define MSGDMA_CSR_STAT_BUSY_GET(v) GET_BIT_VALUE(v, 0) argument
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/altera/
Daltera_msgdmahw.h1 /* SPDX-License-Identifier: GPL-2.0-only */
32 #define MSGDMA_DESC_CTL_GEN_SOP BIT(8)
42 /* Writing ‘1’ to the ‘go’ bit commits the entire descriptor into the
80 u32 rw_fill_level; /* bit 31:16 - write fill level
81 * bit 15:0 - read fill level
84 u32 rw_seq_num; /* bit 31:16 - write sequence number
85 * bit 15:0 - read sequence number
93 #define MSGDMA_CSR_STAT_DESC_BUF_EMPTY BIT(1)
100 #define MSGDMA_CSR_STAT_STOPPED_ON_EARLY BIT(8)
105 #define MSGDMA_CSR_STAT_BUSY_GET(v) GET_BIT_VALUE(v, 0) argument
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dst,sta32x.txt3 The driver for this device only supports I2C.
7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dst,sta32x.txt3 The driver for this device only supports I2C.
7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
22 - clocks, clock-names: Clock specifier for XTI input clock.
24 and disabled when it is removed. The 'clock-names' must be set to 'xti'.
[all …]

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