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/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433-bus.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "samsung,exynos-bus";
13 clock-names = "bus";
14 operating-points-v2 = <&bus_g2d_400_opp_table>;
19 compatible = "samsung,exynos-bus";
21 clock-names = "bus";
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
27 compatible = "samsung,exynos-bus";
29 clock-names = "bus";
30 operating-points-v2 = <&bus_gscl_opp_table>;
[all …]
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
36 compatible = "arm,cortex-a57-pmu";
41 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433-bus.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "samsung,exynos-bus";
13 clock-names = "bus";
14 operating-points-v2 = <&bus_g2d_400_opp_table>;
19 compatible = "samsung,exynos-bus";
21 clock-names = "bus";
22 operating-points-v2 = <&bus_g2d_266_opp_table>;
27 compatible = "samsung,exynos-bus";
29 clock-names = "bus";
30 operating-points-v2 = <&bus_gscl_opp_table>;
[all …]
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
20 #include "exynos4-cpu-thermal.dtsi"
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
20 #include "exynos4-cpu-thermal.dtsi"
32 #address-cells = <1>;
33 #size-cells = <0>;
37 compatible = "arm,cortex-a9";
40 clock-names = "cpu";
41 clock-latency = <160000>;
43 operating-points = <
[all …]
Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a9";
43 clock-names = "cpu";
44 operating-points-v2 = <&cpu0_opp_table>;
45 #cooling-cells = <2>; /* min followed by max */
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dgpu.txt4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or
5 "amd,imageon-XYZ.W", "amd,imageon"
6 for example: "qcom,adreno-306.0", "qcom,adreno"
9 with the chip-id.
11 - reg: Physical base address and length of the controller's registers.
12 - interrupts: The interrupt signal from the gpu.
13 - clocks: device clocks (if applicable)
14 See ../clocks/clock-bindings.txt for details.
15 - clock-names: the following clocks are required by a3xx, a4xx and a5xx
22 - qcom,adreno-630.2
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1350000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-level = <1000000>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/msm/
Dgpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Rob Clark <robdclark@gmail.com>
16 - description: |
18 figure out the chip-id.
20 … - pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$'
21 - const: qcom,adreno
22 - description: |
24 figure out the gpu-id and patch level.
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]