Home
last modified time | relevance | path

Searched +full:opp +full:- +full:350000000 (Results 1 – 14 of 14) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpu/
Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
18 - enum:
19 - amlogic,meson-g12a-mali
20 - realtek,rtd1619-mali
21 - rockchip,px30-mali
[all …]
Darm,mali-midgard.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
17 - items:
18 - enum:
19 - samsung,exynos5250-mali
20 - const: arm,mali-t604
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/
Darm,mali-midgard.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
17 - items:
18 - enum:
19 - samsung,exynos5250-mali
20 - const: arm,mali-t604
[all …]
Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 pattern: '^gpu@[a-f0-9]+$'
18 - items:
19 - enum:
20 - amlogic,meson-g12a-mali
21 - mediatek,mt8183-mali
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
[all …]
Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
[all …]
Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a9";
43 clock-names = "cpu";
44 operating-points-v2 = <&cpu0_opp_table>;
45 #cooling-cells = <2>; /* min followed by max */
[all …]
Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
9 compatible = "socionext,uniphier-pro5";
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 enable-method = "psci";
23 next-level-cache = <&l2>;
[all …]
Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
55 compatible = "arm,cortex-a15";
58 clock-names = "cpu";
59 operating-points-v2 = <&cpu0_opp_table>;
60 #cooling-cells = <2>; /* min followed by max */
[all …]
Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-1800000000 {
50 opp-hz = /bits/ 64 <1800000000>;
51 opp-microvolt = <1250000 1250000 1500000>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/socionext/
Duniphier-pro5.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "socionext,uniphier-pro5";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
24 enable-method = "psci";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
36 compatible = "arm,cortex-a57-pmu";
41 interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]