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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/opp/
Dopp-v2-qcom-level.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm OPP
10 - Niklas Cassel <nks@flawful.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2-qcom-level
20 '^opp-?[0-9]+$':
25 opp-level: true
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Doperating-points-v2-ti-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI CPU OPP (Operating Performance Points)
12 OPP vary based on the silicon variant used. The data sheet sections
18 This document extends the operating-points-v2 binding by providing
22 - Nishanth Menon <nm@ti.com>
25 - $ref: opp-v2-base.yaml#
29 const: operating-points-v2-ti-cpu
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Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
23 the OPP framework with required information (existing HW bitmap).
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Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic OPP (Operating Performance Points)
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
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Dallwinner,sun50i-h6-operating-points.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner H6 CPU OPP
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 OPP varies based on the silicon variant in use. Allwinner Process
18 sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
19 provide the OPP framework with required information.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/msm/
Dgpu.txt4 - compatible: "qcom,adreno-XYZ.W", "qcom,adreno" or
5 "amd,imageon-XYZ.W", "amd,imageon"
6 for example: "qcom,adreno-306.0", "qcom,adreno"
9 with the chip-id.
11 - reg: Physical base address and length of the controller's registers.
12 - interrupts: The interrupt signal from the gpu.
13 - clocks: device clocks (if applicable)
14 See ../clocks/clock-bindings.txt for details.
15 - clock-names: the following clocks are required by a3xx, a4xx and a5xx
22 - qcom,adreno-630.2
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Niklas Cassel <nks@flawful.org>
14 or other device. Each OPP of a device corresponds to a "corner" that has
23 - enum:
24 - qcom,qcs404-cpr
25 - const: qcom,cpr
28 description: Base address and size of the RBCPR register region.
36 - description: Reference clock.
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.txt4 or other device. Each OPP of a device corresponds to a "corner" that has
10 - compatible:
13 Definition: should be "qcom,qcs404-cpr", "qcom,cpr" for qcs404
15 - reg:
17 Value type: <prop-encoded-array>
18 Definition: base address and size of the rbcpr register region
20 - interrupts:
22 Value type: <prop-encoded-array>
25 - clocks:
27 Value type: <prop-encoded-array>
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/
Dqcom,rpmh-rsc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
27 ACTIVE - Triggered by Linux
28 SLEEP - Triggered by F/W
29 WAKE - Triggered by F/W
30 CONTROL - Triggered by F/W
31 See also:: <dt-bindings/soc/qcom,rpmh-rsc.h>
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/kernel/linux/linux-6.6/drivers/clk/qcom/
Da53-pll.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
18 #include "clk-regmap.h"
68 struct dev_pm_opp *opp; in qcom_a53pll_get_freq_tbl() local
70 opp = dev_pm_opp_find_freq_ceil(dev, &freq); in qcom_a53pll_get_freq_tbl()
71 if (IS_ERR(opp)) in qcom_a53pll_get_freq_tbl()
82 dev_pm_opp_put(opp); in qcom_a53pll_get_freq_tbl()
90 struct device *dev = &pdev->dev; in qcom_a53pll_probe()
91 struct device_node *np = dev->of_node; in qcom_a53pll_probe()
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/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap36xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
21 operating-points-v2 = <&cpu0_opp_table>;
23 vbb-supply = <&abb_mpu_iva>;
24 clock-latency = <300000>; /* From omap-cpufreq driver */
25 #cooling-cells = <2>;
29 cpu0_opp_table: opp-table {
30 compatible = "operating-points-v2-ti-cpu";
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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap36xx.dtsi4 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/media/omap3-isp.h>
24 operating-points-v2 = <&cpu0_opp_table>;
26 vbb-supply = <&abb_mpu_iva>;
27 clock-latency = <300000>; /* From omap-cpufreq driver */
28 #cooling-cells = <2>;
32 /* see Documentation/devicetree/bindings/opp/opp.txt */
33 cpu0_opp_table: opp-table {
34 compatible = "operating-points-v2-ti-cpu";
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/fsl/
Dimx8m-ddrc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Leonard Crestez <leonard.crestez@nxp.com>
18 switching is implemented by TF-A code which runs from a SRAM area.
22 capabilities through standard Linux mechanism like devfreq and OPP tables.
27 - enum:
28 - fsl,imx8mn-ddrc
29 - fsl,imx8mm-ddrc
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/fsl/
Dimx8m-ddrc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
18 switching is implemented by TF-A code which runs from a SRAM area.
22 capabilities through standard Linux mechanism like devfreq and OPP tables.
27 - enum:
28 - fsl,imx8mn-ddrc
29 - fsl,imx8mm-ddrc
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/kernel/linux/linux-5.10/drivers/cpufreq/
Dqcom-cpufreq-hw.c1 // SPDX-License-Identifier: GPL-2.0
34 void __iomem *base; member
46 struct dev_pm_opp *opp; in qcom_cpufreq_set_bw() local
50 dev = get_cpu_device(policy->cpu); in qcom_cpufreq_set_bw()
52 return -ENODEV; in qcom_cpufreq_set_bw()
54 opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true); in qcom_cpufreq_set_bw()
55 if (IS_ERR(opp)) in qcom_cpufreq_set_bw()
56 return PTR_ERR(opp); in qcom_cpufreq_set_bw()
58 ret = dev_pm_opp_set_bw(dev, opp); in qcom_cpufreq_set_bw()
59 dev_pm_opp_put(opp); in qcom_cpufreq_set_bw()
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/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
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Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
24 \#power-domain-cells property in the PM domain provider node.
28 pattern: "^(power-controller|power-domain)([@-].*)?$"
30 domain-idle-states:
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
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Dmsm8996.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
8 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/interconnect/qcom,msm8996.h>
11 #include <dt-bindings/interconnect/qcom,msm8996-cbf.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
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Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
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Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
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/kernel/linux/linux-6.6/drivers/opp/
Dti-opp-supply.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
7 * TI OPP supply driver that provides override into the regulator control
8 * for generic opp core to handle devices with ABB regulator and/or
25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
35 * struct ti_opp_supply_data - OMAP specific opp supply data
39 * @old_supplies: Placeholder for supplies information for old OPP.
40 * @new_supplies: Placeholder for supplies information for new OPP.
53 * struct ti_opp_supply_of_data - device tree match data
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/kernel/linux/linux-6.6/drivers/cpufreq/
Dqcom-cpufreq-hw.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
46 void __iomem *base; member
49 * Mutex to synchronize between de-init sequence and re-starting LMh
75 struct dev_pm_opp *opp; in qcom_cpufreq_set_bw() local
79 dev = get_cpu_device(policy->cpu); in qcom_cpufreq_set_bw()
81 return -ENODEV; in qcom_cpufreq_set_bw()
83 opp = dev_pm_opp_find_freq_exact(dev, freq_hz, true); in qcom_cpufreq_set_bw()
84 if (IS_ERR(opp)) in qcom_cpufreq_set_bw()
85 return PTR_ERR(opp); in qcom_cpufreq_set_bw()
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/kernel/linux/linux-5.10/drivers/opp/
Dti-opp-supply.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2017 Texas Instruments Incorporated - https://www.ti.com/
5 * Dave Gerlach <d-gerlach@ti.com>
7 * TI OPP supply driver that provides override into the regulator control
8 * for generic opp core to handle devices with ABB regulator and/or
25 * struct ti_opp_supply_optimum_voltage_table - optimized voltage table
35 * struct ti_opp_supply_data - OMAP specific opp supply data
49 * struct ti_opp_supply_of_data - device tree match data
50 * @flags: specific type of opp supply
52 * @efuse_voltage_uv: Are the efuse entries in micro-volts? if not, assume
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