| /kernel/linux/linux-6.6/drivers/clk/at91/ |
| D | sckc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk-provider.h>
70 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_prepare() local
71 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_prepare()
74 if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en)) in clk_slow_osc_prepare()
77 writel(tmp | osc->bits->cr_osc32en, sckcr); in clk_slow_osc_prepare()
80 udelay(osc->startup_usec); in clk_slow_osc_prepare()
82 usleep_range(osc->startup_usec, osc->startup_usec + 1); in clk_slow_osc_prepare()
89 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_unprepare() local
90 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_unprepare()
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| D | clk-main.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/clk-provider.h>
73 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_prepare() local
74 struct regmap *regmap = osc->regmap; in clk_main_osc_prepare()
96 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_unprepare() local
97 struct regmap *regmap = osc->regmap; in clk_main_osc_unprepare()
113 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_is_prepared() local
114 struct regmap *regmap = osc->regmap; in clk_main_osc_is_prepared()
128 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_save_context() local
130 osc->pms.status = clk_main_osc_is_prepared(hw); in clk_main_osc_save_context()
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| D | at91rm9200.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
86 bool bypass; in at91rm9200_pmc_setup() local
88 i = of_property_match_string(np, "clock-names", "slow_xtal"); in at91rm9200_pmc_setup()
94 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91rm9200_pmc_setup()
109 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91rm9200_pmc_setup()
112 bypass); in at91rm9200_pmc_setup()
120 at91rm9200_pmc->chws[PMC_MAIN] = hw; in at91rm9200_pmc_setup()
128 at91rm9200_pmc->chws[PMC_PLLACK] = hw; in at91rm9200_pmc_setup()
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| D | at91sam9g45.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
101 bool bypass; in at91sam9g45_pmc_setup() local
103 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9g45_pmc_setup()
109 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9g45_pmc_setup()
124 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9g45_pmc_setup()
127 bypass); in at91sam9g45_pmc_setup()
135 at91sam9g45_pmc->chws[PMC_MAIN] = hw; in at91sam9g45_pmc_setup()
146 at91sam9g45_pmc->chws[PMC_PLLACK] = hw; in at91sam9g45_pmc_setup()
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| D | at91sam9n12.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
121 bool bypass; in at91sam9n12_pmc_setup() local
123 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9n12_pmc_setup()
129 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9n12_pmc_setup()
148 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9n12_pmc_setup()
151 bypass); in at91sam9n12_pmc_setup()
161 at91sam9n12_pmc->chws[PMC_MAIN] = hw; in at91sam9n12_pmc_setup()
172 at91sam9n12_pmc->chws[PMC_PLLACK] = hw; in at91sam9n12_pmc_setup()
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| /kernel/linux/linux-5.10/drivers/clk/at91/ |
| D | sckc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk-provider.h>
70 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_prepare() local
71 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_prepare()
74 if (tmp & (osc->bits->cr_osc32byp | osc->bits->cr_osc32en)) in clk_slow_osc_prepare()
77 writel(tmp | osc->bits->cr_osc32en, sckcr); in clk_slow_osc_prepare()
80 udelay(osc->startup_usec); in clk_slow_osc_prepare()
82 usleep_range(osc->startup_usec, osc->startup_usec + 1); in clk_slow_osc_prepare()
89 struct clk_slow_osc *osc = to_clk_slow_osc(hw); in clk_slow_osc_unprepare() local
90 void __iomem *sckcr = osc->sckcr; in clk_slow_osc_unprepare()
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| D | clk-main.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/clk-provider.h>
70 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_prepare() local
71 struct regmap *regmap = osc->regmap; in clk_main_osc_prepare()
93 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_unprepare() local
94 struct regmap *regmap = osc->regmap; in clk_main_osc_unprepare()
110 struct clk_main_osc *osc = to_clk_main_osc(hw); in clk_main_osc_is_prepared() local
111 struct regmap *regmap = osc->regmap; in clk_main_osc_is_prepared()
133 bool bypass) in at91_clk_register_main_osc() argument
135 struct clk_main_osc *osc; in at91_clk_register_main_osc() local
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| D | at91rm9200.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
84 bool bypass; in at91rm9200_pmc_setup() local
86 i = of_property_match_string(np, "clock-names", "slow_xtal"); in at91rm9200_pmc_setup()
92 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91rm9200_pmc_setup()
107 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91rm9200_pmc_setup()
110 bypass); in at91rm9200_pmc_setup()
118 at91rm9200_pmc->chws[PMC_MAIN] = hw; in at91rm9200_pmc_setup()
126 at91rm9200_pmc->chws[PMC_PLLACK] = hw; in at91rm9200_pmc_setup()
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| D | at91sam9g45.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
94 bool bypass; in at91sam9g45_pmc_setup() local
96 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9g45_pmc_setup()
102 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9g45_pmc_setup()
117 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9g45_pmc_setup()
120 bypass); in at91sam9g45_pmc_setup()
128 at91sam9g45_pmc->chws[PMC_MAIN] = hw; in at91sam9g45_pmc_setup()
139 at91sam9g45_pmc->chws[PMC_PLLACK] = hw; in at91sam9g45_pmc_setup()
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| D | at91sam9n12.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
114 bool bypass; in at91sam9n12_pmc_setup() local
116 i = of_property_match_string(np, "clock-names", "slow_clk"); in at91sam9n12_pmc_setup()
122 i = of_property_match_string(np, "clock-names", "main_xtal"); in at91sam9n12_pmc_setup()
141 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in at91sam9n12_pmc_setup()
144 bypass); in at91sam9n12_pmc_setup()
154 at91sam9n12_pmc->chws[PMC_MAIN] = hw; in at91sam9n12_pmc_setup()
165 at91sam9n12_pmc->chws[PMC_PLLACK] = hw; in at91sam9n12_pmc_setup()
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| D | dt-compat.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
31 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup()
48 "atmel,sama5d2-clk-audio-pll-frac",
54 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup()
71 "atmel,sama5d2-clk-audio-pll-pad",
77 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup()
94 "atmel,sama5d2-clk-audio-pll-pmc",
148 if (of_property_read_string(np, "clock-output-names", &name)) in of_sama5d2_clk_generated_setup()
149 name = gcknp->name; in of_sama5d2_clk_generated_setup()
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| D | sama5d4.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
126 bool bypass; in sama5d4_pmc_setup() local
128 i = of_property_match_string(np, "clock-names", "slow_clk"); in sama5d4_pmc_setup()
134 i = of_property_match_string(np, "clock-names", "main_xtal"); in sama5d4_pmc_setup()
154 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d4_pmc_setup()
157 bypass); in sama5d4_pmc_setup()
176 sama5d4_pmc->chws[PMC_PLLACK] = hw; in sama5d4_pmc_setup()
182 sama5d4_pmc->chws[PMC_UTMI] = hw; in sama5d4_pmc_setup()
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| D | sama5d3.c | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
6 #include <dt-bindings/clock/at91.h>
111 bool bypass; in sama5d3_pmc_setup() local
113 i = of_property_match_string(np, "clock-names", "slow_clk"); in sama5d3_pmc_setup()
119 i = of_property_match_string(np, "clock-names", "main_xtal"); in sama5d3_pmc_setup()
139 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in sama5d3_pmc_setup()
142 bypass); in sama5d3_pmc_setup()
161 sama5d3_pmc->chws[PMC_PLLACK] = hw; in sama5d3_pmc_setup()
167 sama5d3_pmc->chws[PMC_UTMI] = hw; in sama5d3_pmc_setup()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | at91-clock.txt | 1 Device Tree Clock bindings for arch-at91
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
10 - compatible : shall be one of the following:
11 "atmel,at91sam9x5-sckc",
12 "atmel,sama5d3-sckc",
13 "atmel,sama5d4-sckc" or
14 "microchip,sam9x60-sckc":
16 - #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
17 - clocks : shall be the input parent clock phandle for the clock.
20 - atmel,osc-bypass : boolean property. Set this when a clock signal is directly
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| /kernel/linux/linux-6.6/drivers/clk/imx/ |
| D | clk-imx6q.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
12 #include <linux/clk-provider.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <dt-bindings/clock/imx6qdl-clock.h>
24 static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
27 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
60 static const char *uart_sels[] = { "pll3_80m", "osc", };
61 static const char *ipg_per_sels[] = { "ipg", "osc", };
62 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
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| D | clk-imxrt1050.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
12 #include <dt-bindings/clock/imxrt1050-clock.h>
16 static const char * const pll_ref_sels[] = {"osc", "dummy", };
17 static const char * const per_sels[] = {"ipg_pdof", "osc", };
26 static const char *const lpuart_sels[] = { "pll3_80m", "osc", };
40 struct device *dev = &pdev->dev; in imxrt1050_clocks_probe()
41 struct device_node *np = dev->of_node; in imxrt1050_clocks_probe()
48 return -ENOMEM; in imxrt1050_clocks_probe()
50 clk_hw_data->num = IMXRT1050_CLK_END; in imxrt1050_clocks_probe()
51 hws = clk_hw_data->hws; in imxrt1050_clocks_probe()
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| /kernel/linux/linux-5.10/drivers/clk/imx/ |
| D | clk-imx6q.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
12 #include <linux/clk-provider.h>
19 #include <dt-bindings/clock/imx6qdl-clock.h>
23 static const char *step_sels[] = { "osc", "pll2_pfd2_396m", };
26 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
59 static const char *uart_sels[] = { "pll3_80m", "osc", };
60 static const char *ipg_per_sels[] = { "ipg", "osc", };
61 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
62 static const char *can_sels[] = { "pll3_60m", "osc", "pll3_80m", };
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| D | clk-imx6sl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
13 #include <dt-bindings/clock/imx6sl-clock.h>
33 static const char *step_sels[] = { "osc", "pll2_pfd2", };
38 static const char *periph_clk2_sels[] = { "pll3_usb_otg", "osc", "osc", "dummy", };
42 static const char *csi_sels[] = { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
46 static const char *perclk_sels[] = { "ipg", "osc", };
54 static const char *ecspi_sels[] = { "pll3_60m", "osc", };
55 static const char *uart_sels[] = { "pll3_80m", "osc", };
59 "pll3_pfd2", "pll3_pfd3", "osc", "dummy", "dummy", "dummy", "dummy", "dummy",
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | atmel,at91sam9x5-sckc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
15 - enum:
16 - atmel,at91sam9x5-sckc
17 - atmel,sama5d3-sckc
18 - atmel,sama5d4-sckc
19 - microchip,sam9x60-sckc
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| D | atmel,at91rm9200-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
20 - items:
21 - const: atmel,at91sam9g20-pmc
22 - const: atmel,at91sam9260-pmc
23 - const: syscon
24 - items:
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| /kernel/linux/linux-5.10/include/linux/iio/frequency/ |
| D | ad9523.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
49 * @channel_divider: 10-bit channel divider.
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
110 * @refb_diff_rcv_en: REFB differential/single-ended input selection.
111 * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
112 * @osc_in_diff_en: OSC differential/ single-ended input selection.
113 * @refa_cmos_neg_inp_en: REFA single-ended neg./pos. input enable.
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| /kernel/linux/linux-6.6/include/linux/iio/frequency/ |
| D | ad9523.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
49 * @channel_divider: 10-bit channel divider.
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
110 * @refb_diff_rcv_en: REFB differential/single-ended input selection.
111 * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
112 * @osc_in_diff_en: OSC differential/ single-ended input selection.
113 * @refa_cmos_neg_inp_en: REFA single-ended neg./pos. input enable.
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| /kernel/linux/linux-5.10/drivers/regulator/ |
| D | anatop-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
30 bool bypass; member
43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel()
50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel()
51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel()
52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel()
53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel()
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
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| /kernel/linux/linux-6.6/drivers/regulator/ |
| D | anatop-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
30 bool bypass; member
43 if (anatop_reg->delay_bit_width && new_sel > old_sel) { in anatop_regmap_set_voltage_time_sel()
50 regmap_read(reg->regmap, anatop_reg->delay_reg, &val); in anatop_regmap_set_voltage_time_sel()
51 val = (val >> anatop_reg->delay_bit_shift) & in anatop_regmap_set_voltage_time_sel()
52 ((1 << anatop_reg->delay_bit_width) - 1); in anatop_regmap_set_voltage_time_sel()
53 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES << in anatop_regmap_set_voltage_time_sel()
65 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel; in anatop_regmap_enable()
85 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) { in anatop_regmap_core_set_voltage_sel()
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| /kernel/linux/linux-6.6/sound/soc/codecs/ |
| D | wm8731.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8731.c -- WM8731 ALSA SoC Audio driver
6 * Copyright 2006-12 Wolfson Microelectronics, plc
76 if (wm8731->deemph) { in wm8731_set_deemph()
79 if (abs(wm8731_deemph[i] - wm8731->playback_fs) < in wm8731_set_deemph()
80 abs(wm8731_deemph[best] - wm8731->playback_fs)) in wm8731_set_deemph()
90 dev_dbg(component->dev, "Set deemphasis %d (%dHz)\n", in wm8731_set_deemph()
102 ucontrol->value.integer.value[0] = wm8731->deemph; in wm8731_get_deemph()
112 unsigned int deemph = ucontrol->value.integer.value[0]; in wm8731_put_deemph()
116 return -EINVAL; in wm8731_put_deemph()
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