| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | qcom,pcie2-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/qcom,pcie2-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PCIe2 PHY controller 10 - Vinod Koul <vkoul@kernel.org> 13 The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm 19 - const: qcom,qcs404-pcie2-phy 20 - const: qcom,pcie2-phy 24 - description: PHY register set [all …]
|
| D | transmit-amplitude.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Common PHY and network PCS transmit amplitude property 10 Binding describing the peak-to-peak transmit amplitude for common PHYs 14 - Marek Behún <kabel@kernel.org> 17 tx-p2p-microvolt: 19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property 20 contains multiple values for various PHY modes, the [all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | qcom-pcie2-phy.txt | 1 Qualcomm PCIe2 PHY controller 4 The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm 8 - compatible: compatible list, should be: 9 "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy" 11 - reg: offset and length of the PHY register set. 12 - #phy-cells: must be 0. 14 - clocks: a clock-specifier pair for the "pipe" clock 16 - vdda-vp-supply: phandle to low voltage regulator 17 - vdda-vph-supply: phandle to high voltage regulator 19 - resets: reset-specifier pairs for the "phy" and "pipe" resets [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/ |
| D | armada-388-clearfog.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include "armada-388-clearfog.dtsi" 13 compatible = "solidrun,clearfog-a1", "marvell,armada388", 17 internal-regs { 27 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-0 = <&rear_button_pins>; 36 pinctrl-names = "default"; [all …]
|
| D | armada-385-turris-omnia.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org> 8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf 11 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/leds/common.h> 16 #include "armada-385.dtsi" 20 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380"; 23 stdout-path = &uart0; [all …]
|
| D | armada-385-linksys.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include "armada-385.dtsi" 18 stdout-path = "serial0:115200n8"; 34 usb3_1_phy: usb3_1-phy { 35 compatible = "usb-nop-xceiv"; 36 vcc-supply = <&usb3_1_vbus>; 37 #phy-cells = <0>; 40 usb3_1_vbus: usb3_1-vbus { [all …]
|
| D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work 9 SERDES mapping - 10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0 12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1 14 4. mini PCIe CON2 - PCIe2 15 5. SFP connector, or optionally SGMII Ethernet 1512 PHY 17 USB 2.0 mapping - 18 0. USB 2.0 - 0 USB pins header CON12 19 1. USB 2.0 - 1 mini PCIe CON2 [all …]
|
| /kernel/linux/linux-5.10/drivers/phy/qualcomm/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o 3 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o 4 obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o 5 obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o 6 obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o 7 obj-$(CONFIG_PHY_QCOM_QMP) += phy-qcom-qmp.o 8 obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o 9 obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o 10 obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o [all …]
|
| D | phy-qcom-pcie2.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. 7 #include <linux/clk-provider.h> 11 #include <linux/phy/phy.h> 16 #include <dt-bindings/phy/phy.h> 50 static int qcom_pcie2_phy_init(struct phy *phy) in qcom_pcie2_phy_init() argument 52 struct qcom_phy *qphy = phy_get_drvdata(phy); in qcom_pcie2_phy_init() 55 ret = reset_control_deassert(qphy->phy_reset); in qcom_pcie2_phy_init() 57 dev_err(qphy->dev, "cannot deassert pipe reset\n"); in qcom_pcie2_phy_init() 61 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qcom_pcie2_phy_init() [all …]
|
| /kernel/linux/linux-6.6/drivers/phy/qualcomm/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-$(CONFIG_PHY_ATH79_USB) += phy-ath79-usb.o 3 obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o 4 obj-$(CONFIG_PHY_QCOM_EDP) += phy-qcom-edp.o 5 obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o 6 obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o 7 obj-$(CONFIG_PHY_QCOM_M31_USB) += phy-qcom-m31.o 8 obj-$(CONFIG_PHY_QCOM_PCIE2) += phy-qcom-pcie2.o 10 obj-$(CONFIG_PHY_QCOM_QMP_COMBO) += phy-qcom-qmp-combo.o 11 obj-$(CONFIG_PHY_QCOM_QMP_PCIE) += phy-qcom-qmp-pcie.o [all …]
|
| D | phy-qcom-pcie2.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved. 7 #include <linux/clk-provider.h> 11 #include <linux/phy/phy.h> 16 #include <dt-bindings/phy/phy.h> 50 static int qcom_pcie2_phy_init(struct phy *phy) in qcom_pcie2_phy_init() argument 52 struct qcom_phy *qphy = phy_get_drvdata(phy); in qcom_pcie2_phy_init() 55 ret = reset_control_deassert(qphy->phy_reset); in qcom_pcie2_phy_init() 57 dev_err(qphy->dev, "cannot deassert pipe reset\n"); in qcom_pcie2_phy_init() 61 ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs); in qcom_pcie2_phy_init() [all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/ |
| D | armada-8040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include "armada-8040.dtsi" 13 compatible = "marvell,armada8040-db", "marvell,armada8040", 14 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 17 stdout-path = "serial0:115200n8"; 34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { 35 compatible = "regulator-fixed"; 36 regulator-name = "cp0-usb3h0-vbus"; 37 regulator-min-microvolt = <5000000>; [all …]
|
| D | armada-7040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include "armada-7040.dtsi" 13 compatible = "marvell,armada7040-db", "marvell,armada7040", 14 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 17 stdout-path = "serial0:115200n8"; 31 cp0_exp_usb3_0_current_regulator: gpio-regulator { 32 compatible = "regulator-gpio"; 33 regulator-name = "cp0-usb3-0-current-regulator"; 34 regulator-type = "current"; [all …]
|
| D | armada-7040-mochabin.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include "armada-7040.dtsi" 17 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 20 stdout-path = "serial0:115200n8"; 34 sfp_eth0: sfp-eth0 { 36 i2c-bus = <&cp0_i2c1>; 37 los-gpios = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>; 38 mod-def0-gpios = <&sfp_gpio 2 GPIO_ACTIVE_LOW>; [all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-8040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include "armada-8040.dtsi" 13 compatible = "marvell,armada8040-db", "marvell,armada8040", 14 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 17 stdout-path = "serial0:115200n8"; 34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { 35 compatible = "regulator-fixed"; 36 regulator-name = "cp0-usb3h0-vbus"; 37 regulator-min-microvolt = <5000000>; [all …]
|
| D | armada-7040-db.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include "armada-7040.dtsi" 13 compatible = "marvell,armada7040-db", "marvell,armada7040", 14 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 17 stdout-path = "serial0:115200n8"; 31 cp0_exp_usb3_0_current_regulator: gpio-regulator { 32 compatible = "regulator-gpio"; 33 regulator-name = "cp0-usb3-0-current-regulator"; 34 regulator-type = "current"; [all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | armada-385-turris-omnia.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org> 8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf 11 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include "armada-385.dtsi" 19 compatible = "cznic,turris-omnia", "marvell,armada385", "marvell,armada380"; 22 stdout-path = &uart0; 42 internal-regs { [all …]
|
| D | armada-388-clearfog.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include "armada-388-clearfog.dtsi" 13 compatible = "solidrun,clearfog-a1", "marvell,armada388", 17 internal-regs { 27 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-0 = <&rear_button_pins>; 36 pinctrl-names = "default"; [all …]
|
| D | armada-385-linksys.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include "armada-385.dtsi" 18 stdout-path = "serial0:115200n8"; 34 usb3_1_phy: usb3_1-phy { 35 compatible = "usb-nop-xceiv"; 36 vcc-supply = <&usb3_1_vbus>; 37 #phy-cells = <0>; 40 usb3_1_vbus: usb3_1-vbus { [all …]
|
| D | spear1310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 compatible = "st,spear-spics-gpio"; 17 st-spics,peripcfg-reg = <0x3b0>; 18 st-spics,sw-enable-bit = <12>; 19 st-spics,cs-value-bit = <11>; 20 st-spics,cs-enable-mask = <3>; 21 st-spics,cs-enable-shift = <8>; 22 gpio-controller; 23 #gpio-cells = <2>; 27 compatible = "st,spear1310-miphy"; [all …]
|
| /kernel/linux/linux-6.6/arch/sh/drivers/pci/ |
| D | pcie-sh7786.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Low-Level PCI Express Support for the SH7786 5 * Copyright (C) 2009 - 2011 Paul Mundt 15 #include <linux/dma-map-ops.h> 21 #include "pcie-sh7786.h" 46 .end = 0xfd000000 + SZ_8M - 1, 51 .end = 0xc0000000 + SZ_512M - 1, 56 .end = 0x10000000 + SZ_64M - 1, 61 .end = 0xfe100000 + SZ_1M - 1, 70 .end = 0xfd800000 + SZ_8M - 1, [all …]
|
| /kernel/linux/linux-5.10/arch/sh/drivers/pci/ |
| D | pcie-sh7786.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Low-Level PCI Express Support for the SH7786 5 * Copyright (C) 2009 - 2011 Paul Mundt 15 #include <linux/dma-mapping.h> 21 #include "pcie-sh7786.h" 47 .end = 0xfd000000 + SZ_8M - 1, 52 .end = 0xc0000000 + SZ_512M - 1, 57 .end = 0x10000000 + SZ_64M - 1, 62 .end = 0xfe100000 + SZ_1M - 1, 71 .end = 0xfd800000 + SZ_8M - 1, [all …]
|
| /kernel/linux/linux-5.10/drivers/staging/mt7621-dts/ |
| D | mt7621.dtsi | 1 #include <dt-bindings/interrupt-controller/mips-gic.h> 2 #include <dt-bindings/gpio/gpio.h> 5 #address-cells = <1>; 6 #size-cells = <1>; 7 compatible = "mediatek,mt7621-soc"; 20 #address-cells = <0>; 21 #interrupt-cells = <1>; 22 interrupt-controller; 23 compatible = "mti,cpu-interrupt-controller"; 31 #clock-cells = <0>; [all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jingoo Han <jingoohan1@gmail.com> 11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com> 16 # Please create a separate DT-schema for your DWC PCIe Endpoint controller 17 # and make sure it's assigned with the vendor-specific compatible string. 21 const: snps,dw-pcie-ep 23 - compatible [all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | spear1310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 compatible = "st,spear-spics-gpio"; 17 st-spics,peripcfg-reg = <0x3b0>; 18 st-spics,sw-enable-bit = <12>; 19 st-spics,cs-value-bit = <11>; 20 st-spics,cs-enable-mask = <3>; 21 st-spics,cs-enable-shift = <8>; 22 gpio-controller; 23 #gpio-cells = <2>; 27 compatible = "st,spear1310-miphy"; [all …]
|