Searched +full:phy +full:- +full:cadence (Results 1 – 25 of 134) sorted by relevance
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| /kernel/linux/linux-6.6/drivers/phy/cadence/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Cadence PHYs
7 tristate "Cadence Torrent PHY driver"
13 Support for Cadence Torrent PHY.
16 tristate "Cadence D-PHY Support"
21 Choose this option if you have a Cadence D-PHY in your
23 cdns-dphy.
26 tristate "Cadence D-PHY Rx Support"
31 Support for Cadence D-PHY in Rx configuration.
34 tristate "Cadence Sierra PHY Driver"
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
3 obj-$(CONFIG_PHY_CADENCE_DPHY) += cdns-dphy.o
4 obj-$(CONFIG_PHY_CADENCE_DPHY_RX) += cdns-dphy-rx.o
5 obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o
6 obj-$(CONFIG_PHY_CADENCE_SALVO) += phy-cadence-salvo.o
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| /kernel/linux/linux-5.10/drivers/phy/cadence/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Cadence PHYs
7 tristate "Cadence Torrent PHY driver"
12 Support for Cadence Torrent PHY.
15 tristate "Cadence D-PHY Support"
20 Choose this option if you have a Cadence D-PHY in your
22 cdns-dphy.
25 tristate "Cadence Sierra PHY Driver"
29 Enable this to support the Cadence Sierra PHY driver
32 tristate "Cadence Salvo PHY Driver"
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_PHY_CADENCE_TORRENT) += phy-cadence-torrent.o
3 obj-$(CONFIG_PHY_CADENCE_DPHY) += cdns-dphy.o
4 obj-$(CONFIG_PHY_CADENCE_SIERRA) += phy-cadence-sierra.o
5 obj-$(CONFIG_PHY_CADENCE_SALVO) += phy-cadence-salvo.o
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | phy-cadence-torrent.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence Torrent SD0801 PHY
10 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
12 PHY also supports multilink multiprotocol combinations including protocols
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
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| D | phy-cadence-sierra.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence Sierra PHY
10 This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink
14 - Swapnil Jakhade <sjakhade@cadence.com>
15 - Yuti Amonkar <yamonkar@cadence.com>
20 - cdns,sierra-phy-t0
21 - ti,sierra-phy-t0
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | phy-cadence-torrent.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Cadence Torrent SD0801 PHY binding
10 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
12 PHY also supports multilink multiprotocol combinations including protocols
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
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| D | phy-cadence-sierra.txt | 1 Cadence Sierra PHY
2 -----------------------
5 - compatible: Must be "cdns,sierra-phy-t0" for Sierra in Cadence platform
6 Must be "ti,sierra-phy-t0" for Sierra in TI's J721E SoC.
7 - resets: Must contain an entry for each in reset-names.
9 - reset-names: Must include "sierra_reset" and "sierra_apb".
10 "sierra_reset" must control the reset line to the PHY.
11 "sierra_apb" must control the reset line to the APB PHY
13 - reg: register range for the PHY.
14 - #address-cells: Must be 1
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| D | cdns,dphy.txt | 1 Cadence DPHY
4 Cadence DPHY block.
7 - compatible: should be set to "cdns,dphy".
8 - reg: physical base address and length of the DPHY registers.
9 - clocks: DPHY reference clocks.
10 - clock-names: must contain "psm" and "pll_ref".
11 - #phy-cells: must be set to 0.
18 clock-names = "psm", "pll_ref";
19 #phy-cells = <0>;
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| /kernel/linux/linux-5.10/drivers/usb/cdns3/ |
| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Cadence USBSS DRD Header File.
5 * Copyright (C) 2017-2018 NXP
6 * Copyright (C) 2018-2019 Cadence.
9 * Pawel Laszczak <pawell@cadence.com>
20 * struct cdns3_role_driver - host/gadget role driver
50 * struct cdns3 - Representation of Cadence USB3 DRD controller.
51 * @dev: pointer to Cadence device struct
68 * @usb2_phy: pointer to USB2 PHY
69 * @usb3_phy: pointer to USB3 PHY
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| /kernel/linux/linux-6.6/drivers/ufs/host/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0+
5 # Copyright (C) 2011-2013 Samsung India Software Operations
26 Synopsys Test Chip is a PHY for prototyping purposes.
42 tristate "Cadence UFS Controller platform driver"
45 This selects the Cadence-specific additions to UFSHCD platform driver.
53 Synopsys Test Chip is a PHY for prototyping purposes.
66 accessing the hardware which includes PHY configuration and vendor
81 accessing the hardware which includes PHY configuration and vendor
110 tristate "TI glue layer for Cadence UFS Controller"
113 This selects driver for TI glue layer for Cadence UFS Host
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| /kernel/linux/linux-6.6/drivers/usb/cdns3/ |
| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Cadence USBSS and USBSSP DRD Header File.
5 * Copyright (C) 2017-2018 NXP
6 * Copyright (C) 2018-2019 Cadence.
9 * Pawel Laszczak <pawell@cadence.com>
20 * struct cdns_role_driver - host/gadget role driver
51 * struct cdns - Representation of Cadence USB3 DRD controller.
52 * @dev: pointer to Cadence device struct
69 * @usb2_phy: pointer to USB2 PHY
70 * @usb3_phy: pointer to USB3 PHY
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/ |
| D | cdns,mhdp8546.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Cadence MHDP8546 bridge
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
16 - cdns,mhdp8546
17 - ti,j721e-mhdp8546
23 - description:
24 Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/ |
| D | cdns,mhdp8546.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence MHDP8546 bridge
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
16 - cdns,mhdp8546
17 - ti,j721e-mhdp8546
22 - description:
23 Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P).
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | cdns-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence PCIe Core
10 - Tom Joseph <tjoseph@cadence.com>
15 One per lane if more than one in the list. If only one PHY listed it must
20 phy-names:
22 - const: pcie-phy
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| D | cdns,cdns-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence PCIe EP Controller
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: cdns-pcie-ep.yaml#
17 const: cdns,cdns-pcie-ep
22 reg-names:
24 - const: reg
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | cdns-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Cadence PCIe Core
10 - Tom Joseph <tjoseph@cadence.com>
15 One per lane if more than one in the list. If only one PHY listed it must
20 phy-names:
22 - const: pcie-phy
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| /kernel/linux/linux-5.10/drivers/scsi/ufs/ |
| D | Kconfig | 5 # Copyright (C) 2011-2013 Samsung India Software Operations
15 # See the COPYING file in the top-level directory or visit
16 # <http://www.gnu.org/licenses/gpl-2.0.html>
68 Synopsys Test Chip is a PHY for prototyping purposes.
85 tristate "Cadence UFS Controller platform driver"
88 This selects the Cadence-specific additions to UFSHCD platform driver.
96 Synopsys Test Chip is a PHY for prototyping purposes.
108 accessing the hardware which includes PHY configuration and vendor
121 accessing the hardware which includes PHY configuration and vendor
138 tristate "TI glue layer for Cadence UFS Controller"
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| /kernel/linux/linux-6.6/drivers/pci/controller/cadence/ |
| D | pcie-cadence-plat.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence PCIe platform driver.
5 * Copyright (c) 2019, Cadence Design Systems
6 * Author: Tom Joseph <tjoseph@cadence.com>
13 #include "pcie-cadence.h"
18 * struct cdns_plat_pcie - private data for this PCIe platform driver
19 * @pcie: Cadence PCIe controller
47 struct device *dev = &pdev->dev; in cdns_plat_pcie_probe()
57 return -EINVAL; in cdns_plat_pcie_probe()
59 is_rc = data->is_rc; in cdns_plat_pcie_probe()
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| D | pcie-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017 Cadence
3 // Cadence PCIe controller driver.
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
9 #include "pcie-cadence.h"
35 u64 sz = 1ULL << fls64(size - 1); in cdns_pcie_set_outbound_region()
76 if (pcie->is_rc) { in cdns_pcie_set_outbound_region()
93 if (pcie->ops->cpu_addr_fixup) in cdns_pcie_set_outbound_region()
94 cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr); in cdns_pcie_set_outbound_region()
114 if (pcie->is_rc) { in cdns_pcie_set_outbound_region_for_normal_msg()
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| /kernel/linux/linux-5.10/drivers/pci/controller/cadence/ |
| D | pcie-cadence-plat.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Cadence PCIe platform driver.
5 * Copyright (c) 2019, Cadence Design Systems
6 * Author: Tom Joseph <tjoseph@cadence.com>
14 #include "pcie-cadence.h"
19 * struct cdns_plat_pcie - private data for this PCIe platform driver
20 * @pcie: Cadence PCIe controller
49 struct device *dev = &pdev->dev; in cdns_plat_pcie_probe()
59 return -EINVAL; in cdns_plat_pcie_probe()
61 data = (struct cdns_plat_pcie_of_data *)match->data; in cdns_plat_pcie_probe()
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| D | pcie-cadence.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017 Cadence
3 // Cadence PCIe controller driver.
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
8 #include "pcie-cadence.h"
34 u64 sz = 1ULL << fls64(size - 1); in cdns_pcie_set_outbound_region()
75 if (pcie->is_rc) { in cdns_pcie_set_outbound_region()
92 if (pcie->ops->cpu_addr_fixup) in cdns_pcie_set_outbound_region()
93 cpu_addr = pcie->ops->cpu_addr_fixup(pcie, cpu_addr); in cdns_pcie_set_outbound_region()
113 if (pcie->is_rc) { in cdns_pcie_set_outbound_region_for_normal_msg()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | macb.txt | 1 * Cadence MACB/GEM Ethernet controller
4 - compatible: Should be "cdns,[<chip>-]{macb|gem}"
5 Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
6 Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs.
7 Use "cdns,sam9x60-macb" for Microchip sam9x60 SoC.
8 Use "cdns,np4-macb" for NP4 SoC devices.
9 Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
10 Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
11 the Cadence GEM, or the generic form: "cdns,gem".
12 Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | cdns,usb3.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller bindings
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | cdns,usb3.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence USBSS-DRD controller
10 - Pawel Laszczak <pawell@cadence.com>
18 - description: OTG controller registers
19 - description: XHCI Host controller registers
20 - description: DEVICE controller registers
22 reg-names:
24 - const: otg
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