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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
11 - Piotr Sroka <piotrs@cadence.com>
14 - $ref: mmc-controller.yaml
19 - enum:
20 - socionext,uniphier-sd4hc
21 - const: cdns,sd4hc
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - socionext,uniphier-sd4hc
19 - const: cdns,sd4hc
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/host.h>
12 #include <linux/mmc/mmc.h>
16 #include "sdhci-pltfm.h"
18 /* HRS - Host Register Set (specific to Cadence) */
19 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */
38 /* SRS - Slot Register Set (SDHCI-compatible) */
41 /* PHY */
56 * The tuned val register is 6 bit-wide, but not the whole of the range is
57 * available. The range 0-42 seems to be available (then 43 wraps around to 0)
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Dsdhci-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/host.h>
12 #include <linux/mmc/mmc.h>
17 #include "sdhci-pltfm.h"
19 /* HRS - Host Register Set (specific to Cadence) */
20 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */
39 /* SRS - Slot Register Set (SDHCI-compatible) */
42 /* PHY */
57 * The tuned val register is 6 bit-wide, but not the whole of the range is
58 * available. The range 0-42 seems to be available (then 43 wraps around to 0)
[all …]
/kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/
Djh7110-starfive-visionfive-2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
26 stdout-path = "serial0:115200n8";
30 timebase-frequency = <4000000>;
38 gpio-restart {
39 compatible = "gpio-restart";
46 clock-frequency = <74250000>;
50 clock-frequency = <125000000>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drv1126-edgeble-neu2-io.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "rv1126-edgeble-neu2.dtsi"
13 compatible = "edgeble,neural-compute-module-2-io",
14 "edgeble,neural-compute-module-2", "rockchip,rv1126";
21 stdout-path = "serial2:1500000n8";
24 vcc12v_dcin: vcc12v-dcin-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc12v_dcin";
27 regulator-always-on;
[all …]
Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
Drk3288-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/pwm/pwm.h>
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 1>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
19 button-up {
22 press-threshold-microvolt = <100000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/
Dmeson-axg-jethome-jethub-j1xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 /dts-v1/;
12 #include "meson-axg.dtsi"
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/thermal/thermal.h>
24 stdout-path = "serial0:115200n8";
27 reserved-memory {
33 emmc_pwrseq: emmc-pwrseq {
34 compatible = "mmc-pwrseq-emmc";
35 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
[all …]
Dmeson-gxm-khadas-vim2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxm.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/meson-aiu.h>
15 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm";
24 stdout-path = "serial0:115200n8";
32 adc-keys {
33 compatible = "adc-keys";
34 io-channels = <&saradc 0>;
[all …]
Dmeson-g12b-w400.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-g12b.dtsi"
11 #include "meson-g12b-s922x.dtsi"
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
[all …]
Dmeson-gx-libretech-pc.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
Drk3288-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/pwm/pwm.h>
13 adc-keys {
14 compatible = "adc-keys";
15 io-channels = <&saradc 1>;
16 io-channel-names = "buttons";
17 keyup-threshold-microvolt = <1800000>;
19 button-up {
22 press-threshold-microvolt = <100000>;
[all …]
Drk3288-tinker.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/rockchip,rk808.h>
12 stdout-path = "serial2:115200n8";
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
27 gpio-keys {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3368-orion-r68-meta.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
15 stdout-path = "serial2:115200n8";
23 emmc_pwrseq: emmc-pwrseq {
24 compatible = "mmc-pwrseq-emmc";
25 pinctrl-0 = <&emmc_reset>;
26 pinctrl-names = "default";
27 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
[all …]
Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 emmc_pwrseq: emmc-pwrseq {
24 compatible = "mmc-pwrseq-emmc";
25 pinctrl-0 = <&emmc_reset>;
26 pinctrl-names = "default";
27 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
30 keys: gpio-keys {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3368-orion-r68-meta.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
20 stdout-path = "serial2:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 pinctrl-0 = <&emmc_reset>;
31 pinctrl-names = "default";
32 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
[all …]
Drk3328-rock-pi-e.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org>
5 * Based on ./rk3328-rock64.dts, which is
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/rockchip.h>
21 compatible = "radxa,rockpi-e", "rockchip,rk3328";
29 stdout-path = "serial2:1500000n8";
[all …]
Drk3368-r88.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
20 stdout-path = "serial2:115200n8";
28 emmc_pwrseq: emmc-pwrseq {
29 compatible = "mmc-pwrseq-emmc";
30 pinctrl-0 = <&emmc_reset>;
31 pinctrl-names = "default";
32 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
35 keys: gpio-keys {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-w400.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-g12b.dtsi"
11 #include "meson-g12b-s922x.dtsi"
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
[all …]
Dmeson-khadas-vim3.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/meson-g12a-gpio.h>
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
19 stdout-path = "serial0:115200n8";
27 adc-keys {
28 compatible = "adc-keys";
29 io-channels = <&saradc 2>;
30 io-channel-names = "buttons";
31 keyup-threshold-microvolt = <1710000>;
[all …]
Dmeson-gxm-khadas-vim2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
12 #include "meson-gxm.dtsi"
15 compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm";
24 stdout-path = "serial0:115200n8";
32 adc-keys {
33 compatible = "adc-keys";
34 io-channels = <&saradc 0>;
35 io-channel-names = "buttons";
[all …]
Dmeson-gx-libretech-pc.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
26 stdout-path = "serial0:921600n8";
31 compatible = "linaro,optee-tz";
36 gpio-keys {
[all …]

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