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Searched +full:phy +full:- +full:input +full:- +full:delay +full:- +full:sd +full:- +full:uhs +full:- +full:sdr25 (Results 1 – 25 of 29) sorted by relevance

12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
11 - Piotr Sroka <piotrs@cadence.com>
14 - $ref: mmc-controller.yaml
19 - enum:
20 - socionext,uniphier-sd4hc
21 - const: cdns,sd4hc
[all …]
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: mmc-controller.yaml#
19 - ti,am654-sdhci-5.1
20 - ti,j721e-sdhci-8bit
21 - ti,j721e-sdhci-4bit
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - socionext,uniphier-sd4hc
19 - const: cdns,sd4hc
[all …]
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <ulf.hansson@linaro.org>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drv1126-edgeble-neu2-io.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "rv1126-edgeble-neu2.dtsi"
13 compatible = "edgeble,neural-compute-module-2-io",
14 "edgeble,neural-compute-module-2", "rockchip,rv1126";
21 stdout-path = "serial2:1500000n8";
24 vcc12v_dcin: vcc12v-dcin-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc12v_dcin";
27 regulator-always-on;
[all …]
Drk3288-tinker.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/rockchip,rk808.h>
12 stdout-path = "serial2:115200n8";
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
27 gpio-keys {
[all …]
Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
18 stdout-path = "serial2:115200n8";
31 power_button: power-button {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pwr_key_l>;
36 key-power {
40 debounce-interval = <100>;
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include "sdhci-pltfm.h"
18 /* HRS - Host Register Set (specific to Cadence) */
19 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */
38 /* SRS - Slot Register Set (SDHCI-compatible) */
41 /* PHY */
56 * The tuned val register is 6 bit-wide, but not the whole of the range is
57 * available. The range 0-42 seems to be available (then 43 wraps around to 0)
80 { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, },
81 { "cdns,phy-input-delay-legacy", SDHCI_CDNS_PHY_DLY_SD_DEFAULT, },
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3328-nanopi-r2s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
17 stdout-path = "serial2:1500000n8";
20 gmac_clk: gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
[all …]
Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
17 stdout-path = "serial5:115200n8";
20 adc-keys {
21 compatible = "adc-keys";
22 io-channels = <&saradc 2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3328-nanopi-r2s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
22 stdout-path = "serial2:1500000n8";
25 gmac_clk: gmac-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
[all …]
Dpx30-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
14 compatible = "rockchip,px30-evb", "rockchip,px30";
23 stdout-path = "serial5:115200n8";
26 adc-keys {
27 compatible = "adc-keys";
28 io-channels = <&saradc 2>;
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Dsdhci-cadence.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "sdhci-pltfm.h"
19 /* HRS - Host Register Set (specific to Cadence) */
20 #define SDHCI_CDNS_HRS04 0x10 /* PHY access port */
39 /* SRS - Slot Register Set (SDHCI-compatible) */
42 /* PHY */
57 * The tuned val register is 6 bit-wide, but not the whole of the range is
58 * available. The range 0-42 seems to be available (then 43 wraps around to 0)
90 { "cdns,phy-input-delay-sd-highspeed", SDHCI_CDNS_PHY_DLY_SD_HS, },
91 { "cdns,phy-input-delay-legacy", SDHCI_CDNS_PHY_DLY_SD_DEFAULT, },
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gx-libretech-pc.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/
Dmeson-gx-libretech-pc.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 /* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/sound/meson-aiu.h>
14 adc-keys {
15 compatible = "adc-keys";
16 io-channels = <&saradc 0>;
17 io-channel-names = "buttons";
18 keyup-threshold-microvolt = <1800000>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288-tinker.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/clock/rockchip,rk808.h>
12 stdout-path = "serial2:115200n8";
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <125000000>;
24 clock-output-names = "ext_gmac";
27 gpio-keys {
[all …]
Drk3288-popmetal.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2014, 2015 Andy Yan <andy.yan@rock-chips.com>
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "PopMetal-RK3288";
12 compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
19 ext_gmac: external-gmac-clock {
20 compatible = "fixed-clock";
21 clock-frequency = <125000000>;
22 clock-output-names = "ext_gmac";
[all …]
Drk3288-veyron.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/rockchip,rk808.h>
9 #include <dt-bindings/input/input.h>
14 stdout-path = "serial2:115200n8";
27 power_button: power-button {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pwr_key_l>;
36 debounce-interval = <100>;
37 wakeup-source;
[all …]
Dam335x-shc.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
11 #include <dt-bindings/input/input.h>
15 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
29 operating-points = <
34 voltage-tolerance = <2>; /* 2 percentage */
35 cpu0-supply = <&dcdc2_reg>;
40 compatible = "gpio-keys";
46 debounce-interval = <1000>;
47 wakeup-source;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/socionext/
Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/thermal/thermal.h>
13 compatible = "socionext,uniphier-pxs3";
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/socionext/
Duniphier-pxs3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-pxs3";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Dam335x-shc.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
11 #include <dt-bindings/input/input.h>
15 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx";
29 operating-points = <
34 voltage-tolerance = <2>; /* 2 percentage */
35 cpu0-supply = <&dcdc2_reg>;
39 gpio-keys {
40 compatible = "gpio-keys";
42 back-button {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]

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