| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | phy-ocelot-serdes.txt | 1 Microsemi Ocelot SerDes muxing driver
2 -------------------------------------
4 On Microsemi Ocelot, there is a handful of registers in HSIO address
5 space for setting up the SerDes to switch port muxing.
7 A SerDes X can be "muxed" to work with switch port Y or Z for example.
8 One specific SerDes can also be used as a PCIe interface.
10 Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
12 There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
13 half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
14 10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | mscc,vsc7514-serdes.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microsemi Ocelot SerDes muxing
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - UNGLinuxDriver@microchip.com
14 On Microsemi Ocelot, there is a handful of registers in HSIO address
15 space for setting up the SerDes to switch port muxing.
17 A SerDes X can be "muxed" to work with switch port Y or Z for example.
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/mscc/ |
| D | ocelot_pcb120.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
9 #include "ocelot.dtsi"
12 compatible = "mscc,ocelot-pcb120", "mscc,ocelot";
15 stdout-path = "serial0:115200n8";
42 pinctrl-names = "default";
43 pinctrl-0 = <&miim1>, <&phy_int_pins>, <&phy_load_save_pins>;
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| D | ocelot.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
10 #address-cells = <1>;
11 #size-cells = <0>;
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/mscc/ |
| D | ocelot_pcb120.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/phy/phy-ocelot-serdes.h>
9 #include "ocelot.dtsi"
12 compatible = "mscc,ocelot-pcb120", "mscc,ocelot";
15 stdout-path = "serial0:115200n8";
25 phy_int_pins: phy-int-pins {
30 phy_load_save_pins: phy-load-save-pins {
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| D | ocelot.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
10 #address-cells = <1>;
11 #size-cells = <0>;
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
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| /kernel/linux/linux-5.10/drivers/phy/mscc/ |
| D | phy-ocelot-serdes.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * SerDes PHY driver for Microsemi Ocelot
14 #include <linux/phy.h>
15 #include <linux/phy/phy.h>
19 #include <dt-bindings/phy/phy-ocelot-serdes.h>
24 struct phy *phys[SERDES_MAX];
60 static int serdes_init_s6g(struct regmap *regmap, u8 serdes, int mode) in serdes_init_s6g() argument
89 ret = serdes_update_mcb_s6g(regmap, serdes); in serdes_init_s6g()
146 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
222 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
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| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Microsemi devices
7 tristate "SerDes PHY driver for Microsemi Ocelot"
12 Enable this for supporting SerDes muxing with Microsemi Ocelot.
|
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Makefile for the Microsemi phy drivers.
6 obj-$(CONFIG_PHY_OCELOT_SERDES) := phy-ocelot-serdes.o
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| /kernel/linux/linux-6.6/drivers/phy/mscc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Microsemi devices
7 tristate "SerDes PHY driver for Microsemi Ocelot"
12 Enable this for supporting SerDes muxing with Microsemi Ocelot.
|
| D | phy-ocelot-serdes.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * SerDes PHY driver for Microsemi Ocelot
14 #include <linux/phy.h>
15 #include <linux/phy/phy.h>
19 #include <dt-bindings/phy/phy-ocelot-serdes.h>
24 struct phy *phys[SERDES_MAX];
60 static int serdes_init_s6g(struct regmap *regmap, u8 serdes, int mode) in serdes_init_s6g() argument
89 ret = serdes_update_mcb_s6g(regmap, serdes); in serdes_init_s6g()
146 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
222 ret = serdes_commit_mcb_s6g(regmap, serdes); in serdes_init_s6g()
[all …]
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # Makefile for the Microsemi phy drivers.
6 obj-$(CONFIG_PHY_OCELOT_SERDES) := phy-ocelot-serdes.o
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| /kernel/linux/linux-5.10/drivers/net/ethernet/mscc/ |
| D | ocelot.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
3 * Microsemi Ocelot Switch driver
15 #include <linux/phy.h>
16 #include <linux/phy/phy.h>
25 #include <soc/mscc/ocelot.h>
62 struct phy_device *phy; member
65 struct phy *serdes; member
92 int ocelot_mact_learn(struct ocelot *ocelot, int port,
95 int ocelot_mact_forget(struct ocelot *ocelot,
97 int ocelot_port_lag_join(struct ocelot *ocelot, int port,
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| D | ocelot_net.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Microsemi Ocelot Switch driver
8 #include "ocelot.h"
15 struct ocelot *ocelot = priv->port.ocelot; in ocelot_setup_tc_cls_flower() local
16 int port = priv->chip_port; in ocelot_setup_tc_cls_flower()
19 return -EOPNOTSUPP; in ocelot_setup_tc_cls_flower()
21 switch (f->command) { in ocelot_setup_tc_cls_flower()
23 return ocelot_cls_flower_replace(ocelot, port, f, ingress); in ocelot_setup_tc_cls_flower()
25 return ocelot_cls_flower_destroy(ocelot, port, f, ingress); in ocelot_setup_tc_cls_flower()
27 return ocelot_cls_flower_stats(ocelot, port, f, ingress); in ocelot_setup_tc_cls_flower()
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| D | ocelot_vsc7514.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi Ocelot Switch driver
19 #include "ocelot.h"
21 #define IFH_EXTRACT_BITFIELD64(x, o, w) (((x) >> (o)) & GENMASK_ULL((w) - 1, 0))
484 static void ocelot_pll5_init(struct ocelot *ocelot) in ocelot_pll5_init() argument
487 * The values are coming from the VTSS API for Ocelot in ocelot_pll5_init()
489 regmap_write(ocelot->targets[HSIO], HSIO_PLL5G_CFG4, in ocelot_pll5_init()
492 regmap_write(ocelot->targets[HSIO], HSIO_PLL5G_CFG0, in ocelot_pll5_init()
504 regmap_write(ocelot->targets[HSIO], HSIO_PLL5G_CFG2, in ocelot_pll5_init()
513 static int ocelot_chip_init(struct ocelot *ocelot, const struct ocelot_ops *ops) in ocelot_chip_init() argument
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| D | ocelot.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi Ocelot Switch driver
9 #include "ocelot.h"
21 static inline u32 ocelot_mact_read_macaccess(struct ocelot *ocelot) in ocelot_mact_read_macaccess() argument
23 return ocelot_read(ocelot, ANA_TABLES_MACACCESS); in ocelot_mact_read_macaccess()
26 static inline int ocelot_mact_wait_for_completion(struct ocelot *ocelot) in ocelot_mact_wait_for_completion() argument
31 ocelot, val, in ocelot_mact_wait_for_completion()
37 static void ocelot_mact_select(struct ocelot *ocelot, in ocelot_mact_select() argument
54 ocelot_write(ocelot, macl, ANA_TABLES_MACLDATA); in ocelot_mact_select()
55 ocelot_write(ocelot, mach, ANA_TABLES_MACHDATA); in ocelot_mact_select()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/dsa/ |
| D | ocelot.txt | 1 Microchip Ocelot switch driver family
5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
30 the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
39 Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled
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| /kernel/linux/linux-6.6/drivers/net/ethernet/mscc/ |
| D | ocelot.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Microsemi Ocelot Switch driver
7 #include <linux/dsa/ocelot.h>
10 #include <linux/phy/phy.h>
14 #include "ocelot.h"
30 /* Caller must hold &ocelot->mact_lock */
31 static inline u32 ocelot_mact_read_macaccess(struct ocelot *ocelot) in ocelot_mact_read_macaccess() argument
33 return ocelot_read(ocelot, ANA_TABLES_MACACCESS); in ocelot_mact_read_macaccess()
36 /* Caller must hold &ocelot->mact_lock */
37 static inline int ocelot_mact_wait_for_completion(struct ocelot *ocelot) in ocelot_mact_wait_for_completion() argument
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/microchip,sparx5.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <1>;
23 stdout-path = "serial0:115200n8";
27 #address-cells = <1>;
28 #size-cells = <0>;
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| /kernel/linux/linux-6.6/ |
| D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0005_linux_include.patch | 7 Change-Id: Icf23f02df7b566848af808b9eeaed889d1773e71
9 diff --git a/include/drm/bridge/cdns-mhdp.h b/include/drm/bridge/cdns-mhdp.h
12 --- /dev/null
13 +++ b/include/drm/bridge/cdns-mhdp.h
14 @@ -0,0 +1,921 @@
15 +/* SPDX-License-Identifier: GPL-2.0 */
18 + * Author: Chris Zhong <zyw@rock-chips.com>
39 +#include <sound/hdmi-codec.h>
111 +/* source phy comp */
159 +/* dptx phy addr */
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