| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | dcn20_fpu.c | 989 display_e2e_pipe_params_st *pipes) in dcn20_populate_dml_writeback_from_context() argument
1002 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1003 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1004 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1005 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1006 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1007 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1008 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1009 pipes[pipe_cnt].dout.wb.wb_vtaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
1010 pipes[pipe_cnt].dout.wb.wb_htaps_chroma = wb_info->dwb_params.scaler_taps.h_taps_c; in dcn20_populate_dml_writeback_from_context()
[all …]
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| D | dcn20_fpu.h | 33 display_e2e_pipe_params_st *pipes);
37 display_e2e_pipe_params_st *pipes,
41 display_e2e_pipe_params_st *pipes,
46 display_e2e_pipe_params_st *pipes,
50 display_e2e_pipe_params_st *pipes,
78 display_e2e_pipe_params_st *pipes,
89 display_e2e_pipe_params_st *pipes);
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 1679 /* Always do 1-to-1 mapping when number of DSCs is same as number of pipes */ in dcn20_acquire_dsc()
1737 /* The number of DSCs can be less than the number of pipes */ in dcn20_add_dsc_to_stream_resource()
1970 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn20_populate_dml_writeback_from_context() argument
1981 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
1982 pipes[pipe_cnt].dout.num_active_wb++; in dcn20_populate_dml_writeback_from_context()
1983 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
1984 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
1985 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
1986 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
1987 pipes[pipe_cnt].dout.wb.wb_htaps_luma = 1; in dcn20_populate_dml_writeback_from_context()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | dcn30_fpu.c | 258 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_fpu_populate_dml_writeback_from_context() argument
275 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_fpu_populate_dml_writeback_from_context()
276 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_fpu_populate_dml_writeback_from_context()
282 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_fpu_populate_dml_writeback_from_context()
283 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_fpu_populate_dml_writeback_from_context()
326 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz, in dcn30_fpu_populate_dml_writeback_from_context()
333 pipes[pipe_cnt].pipe.dest.htotal, in dcn30_fpu_populate_dml_writeback_from_context()
338 pipes[pipe_cnt].dout.wb = dout_wb; in dcn30_fpu_populate_dml_writeback_from_context()
349 display_e2e_pipe_params_st *pipes, in dcn30_fpu_set_mcif_arb_params() argument
358 wb_arb_params->cli_watermark[i] = get_wm_writeback_urgent(dml, pipes, pipe_cnt) * 1000; in dcn30_fpu_set_mcif_arb_params()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| D | dcn301_fpu.c | 296 display_e2e_pipe_params_st *pipes, in calculate_wm_set_for_vlevel() argument
303 pipes[0].clks_cfg.voltage = vlevel; in calculate_wm_set_for_vlevel()
304 pipes[0].clks_cfg.dcfclk_mhz = dml->soc.clock_limits[vlevel].dcfclk_mhz; in calculate_wm_set_for_vlevel()
305 pipes[0].clks_cfg.socclk_mhz = dml->soc.clock_limits[vlevel].socclk_mhz; in calculate_wm_set_for_vlevel()
311 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
312 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
313 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
314 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
315 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
316 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_hwss.c | 102 struct pipe_ctx *pipes = in dp_enable_link_phy() local
118 if (pipes[i].stream != NULL && in dp_enable_link_phy()
119 pipes[i].stream->link == link) { in dp_enable_link_phy()
120 if (pipes[i].clock_source != NULL && in dp_enable_link_phy()
121 pipes[i].clock_source->id != CLOCK_SOURCE_ID_DP_DTO) { in dp_enable_link_phy()
122 pipes[i].clock_source = dp_cs; in dp_enable_link_phy()
123 pipes[i].stream_res.pix_clk_params.requested_pix_clk_100hz = in dp_enable_link_phy()
124 pipes[i].stream->timing.pix_clk_100hz; in dp_enable_link_phy()
125 pipes[i].clock_source->funcs->program_pix_clk( in dp_enable_link_phy()
126 pipes[i].clock_source, in dp_enable_link_phy()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | dcn314_fpu.c | 308 display_e2e_pipe_params_st *pipes, in dcn314_populate_dml_pipes_from_context_fpu() argument
319 dcn31x_populate_dml_pipes_from_context(dc, context, pipes, fast_validate); in dcn314_populate_dml_pipes_from_context_fpu()
334 pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min; in dcn314_populate_dml_pipes_from_context_fpu()
336 pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total; in dcn314_populate_dml_pipes_from_context_fpu()
340 pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive; in dcn314_populate_dml_pipes_from_context_fpu()
341 pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines); in dcn314_populate_dml_pipes_from_context_fpu()
346 pipes[pipe_cnt].pipe.dest.vblank_nom = in dcn314_populate_dml_pipes_from_context_fpu()
347 max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width + v_back_porch + 2); in dcn314_populate_dml_pipes_from_context_fpu()
348 …pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblan… in dcn314_populate_dml_pipes_from_context_fpu()
357 … pipes[i].pipe.src.hostvm = dc->vm_pa_config.is_hvm_enabled || dc->res_pool->hubbub->riommu_active; in dcn314_populate_dml_pipes_from_context_fpu()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | dcn32_fpu.c | 264 display_e2e_pipe_params_st *pipes, in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() argument
280 dcn32_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, false); in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
282 /* for subvp + DRR case, if subvp pipes are still present we support pstate */ in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
309 * dcn32_helper_populate_phantom_dlg_params - Get DLG params for phantom pipes
313 * @pipes: [in] DML pipe params array
316 * This function must be called AFTER the phantom pipes are added to context
317 * and run through DML (so that the DLG params for the phantom pipes can be
318 * populated), and BEFORE we program the timing for the phantom pipes.
322 display_e2e_pipe_params_st *pipes, in dcn32_helper_populate_phantom_dlg_params() argument
336 pipes[pipe_idx].pipe.dest.vstartup_start = in dcn32_helper_populate_phantom_dlg_params()
[all …]
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| D | dcn32_fpu.h | 36 display_e2e_pipe_params_st *pipes,
46 display_e2e_pipe_params_st *pipes,
52 display_e2e_pipe_params_st *pipes,
58 display_e2e_pipe_params_st *pipes,
66 display_e2e_pipe_params_st *pipes,
72 void dcn32_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
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| /kernel/linux/linux-6.6/drivers/gpu/drm/ci/xfails/ |
| D | msm-apq8016-fails.txt | 3 kms_cursor_legacy@all-pipes-forked-bo,Fail
4 kms_cursor_legacy@all-pipes-forked-move,Fail
5 kms_cursor_legacy@all-pipes-single-bo,Fail
6 kms_cursor_legacy@all-pipes-single-move,Fail
7 kms_cursor_legacy@all-pipes-torture-bo,Fail
8 kms_cursor_legacy@all-pipes-torture-move,Fail
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| /kernel/linux/linux-6.6/Documentation/gpu/amdgpu/display/ |
| D | mpo-overview.rst | 50 For this hardware example, we have 4 pipes (if you don't know what AMD pipe
53 configuration for optimal single display output (e.g., 2 pipes per plane).
56 display - will see 4 pipes in use, 2 per plane.
204 the two displays, we need to use 2 pipes. See the example below where we avoid
207 - 1 display (1 pipe) + MPO (1 pipe), we will use two pipes
208 - 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the
209 middle of both displays needs 2 pipes.
210 - 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes.
217 * When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO
218 * When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes,
53 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level() argument
59 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
64 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
67 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
80 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
82 recalculate_params(mode_lib, pipes, num_pipes); \
108 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
111 recalculate_params(mode_lib, pipes, num_pipes); \
164 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bytes() argument
[all …]
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| /kernel/linux/linux-6.6/drivers/platform/goldfish/ |
| D | goldfish_pipe.c | 127 /* pipe ID - index into goldfish_pipe_dev::pipes array */
144 /* doubly linked list of signalled pipes, protected by
177 * - pipes, pipes_capacity
178 * - [*pipes, *pipes + pipes_capacity) - array data
183 * in all allocated pipes
187 * the only operation that happens often is the signalled pipes array
195 * Array of the pipes of |pipes_capacity| elements,
198 struct goldfish_pipe **pipes; member
204 /* Head of a doubly linked list of signalled pipes */
522 pipe = dev->pipes[id]; in signalled_pipes_add_locked()
[all …]
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| /kernel/linux/linux-5.10/drivers/platform/goldfish/ |
| D | goldfish_pipe.c | 127 /* pipe ID - index into goldfish_pipe_dev::pipes array */
144 /* doubly linked list of signalled pipes, protected by
177 * - pipes, pipes_capacity
178 * - [*pipes, *pipes + pipes_capacity) - array data
183 * in all allocated pipes
187 * the only operation that happens often is the signalled pipes array
195 * Array of the pipes of |pipes_capacity| elements,
198 struct goldfish_pipe **pipes; member
204 /* Head of a doubly linked list of signalled pipes */
525 pipe = dev->pipes[id]; in signalled_pipes_add_locked()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 46 const display_e2e_pipe_params_st *pipes,
54 const display_e2e_pipe_params_st *pipes, in dml_get_voltage_level() argument
60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
68 if (need_recalculate && pipes[0].clks_cfg.dppclk_mhz != 0) in dml_get_voltage_level()
82 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
84 recalculate_params(mode_lib, pipes, num_pipes); \
130 …attr(struct display_mode_lib *mode_lib, const display_e2e_pipe_params_st *pipes, unsigned int num_…
133 recalculate_params(mode_lib, pipes, num_pipes); \
209 const display_e2e_pipe_params_st *pipes, in get_total_immediate_flip_bytes() argument
[all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/ |
| D | xillybus.rst | 17 -- Seekable pipes
23 -- Channels, pipes, and the message channel
85 project to another (the number of data pipes needed in each direction and
90 Xillybus presents independent data streams, which resemble pipes or TCP/IP
125 possibly pressing CTRL-C as some stage, even though the xillybus_* pipes have
128 The driver and hardware are designed to behave sensibly as pipes, including:
138 device files are treated like two independent pipes (except for sharing a
144 Xillybus pipes are configured (on the IP core) to be either synchronous or
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
156 has been requested by a read() call. On synchronous pipes, only the amount
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | xillybus.rst | 17 -- Seekable pipes
23 -- Channels, pipes, and the message channel
85 project to another (the number of data pipes needed in each direction and
90 Xillybus presents independent data streams, which resemble pipes or TCP/IP
125 possibly pressing CTRL-C as some stage, even though the xillybus_* pipes have
128 The driver and hardware are designed to behave sensibly as pipes, including:
138 device files are treated like two independent pipes (except for sharing a
144 Xillybus pipes are configured (on the IP core) to be either synchronous or
154 For FPGA to host pipes, asynchronous pipes allow data transfer from the FPGA
156 has been requested by a read() call. On synchronous pipes, only the amount
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | dcn31_fpu.c | 445 void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes, in dcn31_zero_pipe_dcc_fraction() argument
450 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0; in dcn31_zero_pipe_dcc_fraction()
451 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0; in dcn31_zero_pipe_dcc_fraction()
484 display_e2e_pipe_params_st *pipes, in dcn31_calculate_wm_and_dlg_fp() argument
505 pipes[0].clks_cfg.voltage = vlevel; in dcn31_calculate_wm_and_dlg_fp()
506 pipes[0].clks_cfg.dcfclk_mhz = dcfclk; in dcn31_calculate_wm_and_dlg_fp()
507 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn31_calculate_wm_and_dlg_fp()
515 …context->bw_ctx.bw.dcn.watermarks.a.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn31_calculate_wm_and_dlg_fp()
516 …state_enter_plus_exit_ns = get_wm_stutter_enter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
517 …a.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->bw_ctx.dml, pipes, pipe_cnt) * 1000; in dcn31_calculate_wm_and_dlg_fp()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 1450 display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_pipes_from_context() argument
1455 dcn20_populate_dml_pipes_from_context(dc, context, pipes); in dcn30_populate_dml_pipes_from_context()
1461 pipes[pipe_cnt++].pipe.scale_ratio_depth.lb_depth = in dcn30_populate_dml_pipes_from_context()
1469 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) in dcn30_populate_dml_writeback_from_context() argument
1484 pipes[pipe_cnt].dout.wb_enable = 0; in dcn30_populate_dml_writeback_from_context()
1485 pipes[pipe_cnt].dout.num_active_wb = 0; in dcn30_populate_dml_writeback_from_context()
1491 pipes[pipe_cnt].dout.wb_enable = 1; in dcn30_populate_dml_writeback_from_context()
1492 pipes[pipe_cnt].dout.num_active_wb++; in dcn30_populate_dml_writeback_from_context()
1535 pipes[pipe_cnt].pipe.dest.pixel_rate_mhz, in dcn30_populate_dml_writeback_from_context()
1542 pipes[pipe_cnt].pipe.dest.htotal, in dcn30_populate_dml_writeback_from_context()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
146 komeda_sprintf(&str, ", pipes[0]: "); in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
148 komeda_sprintf(&str, ", pipes[1]: "); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_event.c | 110 return (a->pipes[0] | a->pipes[1]) & in is_new_frame()
120 u64 evts_mask = evts->global | evts->pipes[0] | evts->pipes[1]; in komeda_print_events()
146 komeda_sprintf(&str, ", pipes[0]: "); in komeda_print_events()
147 evt_str(&str, evts->pipes[0]); in komeda_print_events()
148 komeda_sprintf(&str, ", pipes[1]: "); in komeda_print_events()
149 evt_str(&str, evts->pipes[1]); in komeda_print_events()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_smp.h | 25 * In some hw, some blocks are statically allocated for certain pipes
40 * for the newly assigned pipes, so we don't take away blocks
41 * assigned to pipes that are still scanning out
43 * released clients, since at that point old pipes are no longer
53 /* assigned pipes (hw updated at _prepare_commit()): */
56 /* released pipes (hw updated at _complete_commit()): */
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_smp.h | 25 * In some hw, some blocks are statically allocated for certain pipes
40 * for the newly assigned pipes, so we don't take away blocks
41 * assigned to pipes that are still scanning out
43 * released clients, since at that point old pipes are no longer
53 /* assigned pipes (hw updated at _prepare_commit()): */
56 /* released pipes (hw updated at _complete_commit()): */
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.h | 51 display_e2e_pipe_params_st *pipes,
64 display_e2e_pipe_params_st *pipes,
71 display_e2e_pipe_params_st *pipes,
76 struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes);
80 display_e2e_pipe_params_st *pipes,
106 display_e2e_pipe_params_st *pipes, int pipe_cnt, int vlevel);
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_resource_helpers.c | 127 /* merge pipes if necessary */ in dcn32_merge_pipes_for_subvp()
131 // For now merge all pipes for SubVP since pipe split case isn't supported yet in dcn32_merge_pipes_for_subvp()
133 /* if ODM merge we ignore mpc tree, mpo pipes will have their own flags */ in dcn32_merge_pipes_for_subvp()
266 * number of DET for that given plane will be split among the pipes driving that plane.
273 * among those pipes.
274 * 4. Assign the DET override to the DML pipes.
278 * @pipes: Array of DML pipes
284 display_e2e_pipe_params_st *pipes) in dcn32_determine_det_override() argument
313 /* Note: pipe_plane_count indicates the number of pipes to be used for a in dcn32_determine_det_override()
342 pipes[pipe_cnt].pipe.src.det_size_override = pipe_segments[i] * DCN3_2_DET_SEG_SIZE; in dcn32_determine_det_override()
[all …]
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