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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-pixel-combiner.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp Pixel Combiner
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a
15 of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
16 either one screen, two screens, or virtual screens. The pixel combiner is
17 also responsible for generating some of the control signals for the pixel link
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Dfsl,imx8qxp-pixel-link.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp Display Pixel Link
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard
14 asynchronous linkage between pixel sources(display controller or
15 camera module) and pixel consumers(imaging or displays).
16 It consists of two distinct functions, a pixel transfer function and a
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/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/imx/
Dimx8qxp-pixel-combiner.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <linux/media-bus-format.h>
52 #define DRIVER_NAME "imx8qxp-pixel-combiner"
78 return readl(pc->base + offset); in imx8qxp_pc_read()
84 writel(value, pc->base + offset); in imx8qxp_pc_write()
104 if (mode->hdisplay > 2560) in imx8qxp_pc_bridge_mode_valid()
113 struct imx8qxp_pc_channel *ch = bridge->driver_private; in imx8qxp_pc_bridge_attach()
114 struct imx8qxp_pc *pc = ch->pc; in imx8qxp_pc_bridge_attach()
117 DRM_DEV_ERROR(pc->dev, in imx8qxp_pc_bridge_attach()
119 return -EINVAL; in imx8qxp_pc_bridge_attach()
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DMakefile1 obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
2 obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
3 obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
4 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
5 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o
6 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o
/kernel/linux/linux-6.6/Documentation/gpu/amdgpu/display/
Ddc-glossary.rst7 'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
19 Application-Specific Integrated Circuit
31 Bits Per Pixel
34 * PCLK: Pixel Clock
41 * PPLL: Pixel PLL
49 Cathode Ray Tube Controller - commonly called "Controller" - Generates
50 raw stream of pixels, clocked at pixel clock
95 Display Stream Compression (Reduce the amount of bits to represent pixel
96 count while at the same pixel clock)
108 Display Micro-Controller Unit
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Ddcn-overview.rst10 .. kernel-figure:: dc_pipeline_overview.svg
19 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel
20 processing such as color space conversion, linearization of pixel data, tone
24 multiple planes, using global or per-pixel alpha.
26 * **Output Pixel Processing (OPP)**: Process and format pixels to be sent to
29 * **Output Pipe Timing Combiner (OPTC)**: It generates time output to combine
38 * **Multi-Media HUB (MMHUBBUB)**: Memory controller interface for DMCUB and DWB
43 the Display Micro-Controller Unit - version B (DMCUB), which is handled via
66 1. Pixel data interface (red): Represents the pixel data flow;
84 ----------------------
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/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
25 image flip, 8x8 block transfer (see IRT description), pixel component
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
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/kernel/linux/linux-6.6/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
25 image flip, 8x8 block transfer (see IRT description), pixel component
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
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/kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/device_include/
Dsvga3d_types.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 2012-2015 VMware, Inc.
28 * svga3d_types.h --
46 #define SVGA3D_INVALID_ID ((uint32)-1)
48 typedef uint8 SVGABool8; /* 8-bit Bool definition */
49 typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
176 SVGA3D_ARGB_S10E5 = 24, /* 16-bit floating-point ARGB */
177 SVGA3D_ARGB_S23E8 = 25, /* 32-bit floating-point ARGB */
192 /* Single- and dual-component floating point formats */
278 SVGA3D_ATI1 = 108, /* DX9-specific BC4_UNORM */
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0020_linux_drivers_gpu.patch7 Change-Id: Ie95ebc16d7424b75135df39b9e20893d1a5171d6
9 diff --git a/drivers/gpu/Makefile b/drivers/gpu/Makefile
11 --- a/drivers/gpu/Makefile
13 @@ -3,6 +3,7 @@
16 obj-$(CONFIG_TEGRA_HOST1X) += host1x/
17 +obj-y += imx/
18 obj-y += drm/ vga/
19 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
20 obj-$(CONFIG_TRACE_GPU_MEM) += trace/
21 diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/
D0001_linux_arch.patch7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
44 -config MITIGATE_SPECTRE_BRANCH_HISTORY
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/kernel/linux/linux-6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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