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Searched full:pll_ref_clk (Results 1 – 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/drivers/phy/cadence/
Dcdns-dphy.c90 struct clk *pll_ref_clk; member
100 unsigned long pll_ref_hz = clk_get_rate(dphy->pll_ref_clk); in cdns_dsi_get_dphy_pll_cfg()
287 clk_prepare_enable(dphy->pll_ref_clk); in cdns_dphy_power_on()
300 clk_disable_unprepare(dphy->pll_ref_clk); in cdns_dphy_power_off()
338 dphy->pll_ref_clk = devm_clk_get(&pdev->dev, "pll_ref"); in cdns_dphy_probe()
339 if (IS_ERR(dphy->pll_ref_clk)) in cdns_dphy_probe()
340 return PTR_ERR(dphy->pll_ref_clk); in cdns_dphy_probe()
/kernel/linux/linux-6.6/drivers/phy/cadence/
Dcdns-dphy.c108 struct clk *pll_ref_clk; member
124 unsigned long pll_ref_hz = clk_get_rate(dphy->pll_ref_clk); in cdns_dsi_get_dphy_pll_cfg()
384 clk_prepare_enable(dphy->pll_ref_clk); in cdns_dphy_power_on()
397 clk_disable_unprepare(dphy->pll_ref_clk); in cdns_dphy_power_off()
433 dphy->pll_ref_clk = devm_clk_get(&pdev->dev, "pll_ref"); in cdns_dphy_probe()
434 if (IS_ERR(dphy->pll_ref_clk)) in cdns_dphy_probe()
435 return PTR_ERR(dphy->pll_ref_clk); in cdns_dphy_probe()
/kernel/linux/linux-6.6/drivers/usb/dwc3/
Ddwc3-octeon.c34 * HighSpeed PLL uses PLL_REF_CLK for reference clck
36 * HighSpeed PLL uses PLL_REF_CLK for reference clck
441 else if (strcmp(hs_clock_type, "pll_ref_clk")) in dwc3_octeon_probe()
442 dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", in dwc3_octeon_probe()
449 if (strcmp(hs_clock_type, "pll_ref_clk")) in dwc3_octeon_probe()
450 dev_warn(dev, "Invalid HS clock type %s, using pll_ref_clk instead\n", in dwc3_octeon_probe()
/kernel/linux/linux-5.10/arch/mips/cavium-octeon/
Docteon-usb.c32 * HighSpeed PLL uses PLL_REF_CLK for reference clck
34 * HighSpeed PLL uses PLL_REF_CLK for reference clck
322 else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) in dwc3_octeon_clocks_start()
325 pr_err("Invalid HS clock type %s, using pll_ref_clk instead\n", in dwc3_octeon_clocks_start()
330 else if (strcmp(hs_clock_type, "pll_ref_clk") == 0) in dwc3_octeon_clocks_start()
333 pr_err("Invalid HS clock type %s, using pll_ref_clk instead\n", in dwc3_octeon_clocks_start()
/kernel/linux/linux-6.6/drivers/clk/
Dclk-tps68470.c48 * PLL_REF_CLK should be as close as possible to 100kHz
49 * PLL_REF_CLK = input clk / XTALDIV[7:0] + 30)
51 * PLL_VCO_CLK = (PLL_REF_CLK * (plldiv*2 + 320))
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dcdns,dphy.txt17 clocks = <&psm_clk>, <&pll_ref_clk>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dcdns,dphy.yaml53 clocks = <&psm_clk>, <&pll_ref_clk>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,sdx75-tlmm.yaml84 pll_clk_aux, pll_ref_clk, pri_mi2s, prng_rosc, qdss_cti, qdss_gpio,
/kernel/linux/linux-5.10/drivers/phy/xilinx/
Dphy-zynqmp.c173 * @pll_ref_clk: value to be written to register for corresponding ref clk rate
179 u8 pll_ref_clk; member
347 PLL_FREQ_MASK, ssc->pll_ref_clk); in xpsgtr_configure_pll()
/kernel/linux/linux-5.10/drivers/crypto/cavium/nitrox/
Dnitrox_hal.c7 #define PLL_REF_CLK 50 macro
619 ndev->hw.freq = (rst_boot.pnr_mul + 3) * PLL_REF_CLK; in nitrox_get_hwinfo()
/kernel/linux/linux-6.6/drivers/crypto/cavium/nitrox/
Dnitrox_hal.c8 #define PLL_REF_CLK 50 macro
620 ndev->hw.freq = (rst_boot.pnr_mul + 3) * PLL_REF_CLK; in nitrox_get_hwinfo()
/kernel/linux/linux-6.6/drivers/phy/xilinx/
Dphy-zynqmp.c192 * @pll_ref_clk: value to be written to register for corresponding ref clk rate
198 u8 pll_ref_clk; member
396 PLL_FREQ_MASK, ssc->pll_ref_clk); in xpsgtr_configure_pll()
/kernel/linux/linux-6.6/drivers/gpu/drm/kmb/
Dkmb_dsi.c870 /* pll_ref_clk: - valid range: 2~64 MHz; Typically 24 MHz in mipi_tx_pll_setup()
876 * -conditions: - (pll_ref_clk / N) >= 2 MHz in mipi_tx_pll_setup()
877 * -(pll_ref_clk / N) <= 8 MHz in mipi_tx_pll_setup()
881 * -Fvco = (M/N) * pll_ref_clk in mipi_tx_pll_setup()
/kernel/linux/linux-6.6/drivers/pinctrl/qcom/
Dpinctrl-sdx75.c874 MSM_PIN_FUNCTION(pll_ref_clk),
969 [37] = PINGROUP(37, qlink0_l_en, _, pll_ref_clk, prng_rosc, vsense_trigger_mirnat, _, _, _, _, _),
/kernel/linux/linux-5.10/drivers/misc/habanalabs/goya/
Dgoya.c683 trace_freq = PLL_REF_CLK; in goya_fetch_psoc_frequency()
685 trace_freq = PLL_REF_CLK / (div_fctr + 1); in goya_fetch_psoc_frequency()
688 pll_clk = PLL_REF_CLK * (nf + 1) / ((nr + 1) * (od + 1)); in goya_fetch_psoc_frequency()
/kernel/linux/linux-6.6/drivers/accel/habanalabs/goya/
Dgoya.c777 freq = PLL_REF_CLK; in goya_fetch_psoc_frequency()
779 freq = PLL_REF_CLK / (div_fctr + 1); in goya_fetch_psoc_frequency()
782 pll_clk = PLL_REF_CLK * (nf + 1) / in goya_fetch_psoc_frequency()
/kernel/linux/linux-5.10/drivers/misc/habanalabs/gaudi/
Dgaudi.c645 trace_freq = PLL_REF_CLK; in gaudi_fetch_psoc_frequency()
647 trace_freq = PLL_REF_CLK / (div_fctr + 1); in gaudi_fetch_psoc_frequency()
650 pll_clk = PLL_REF_CLK * (nf + 1) / ((nr + 1) * (od + 1)); in gaudi_fetch_psoc_frequency()
/kernel/linux/linux-5.10/drivers/misc/habanalabs/common/
Dhabanalabs.h613 #define PLL_REF_CLK 50 macro
/kernel/linux/linux-6.6/drivers/accel/habanalabs/gaudi/
Dgaudi.c936 freq = PLL_REF_CLK; in gaudi_fetch_psoc_frequency()
938 freq = PLL_REF_CLK / (div_fctr + 1); in gaudi_fetch_psoc_frequency()
941 pll_clk = PLL_REF_CLK * (nf + 1) / in gaudi_fetch_psoc_frequency()
/kernel/linux/linux-6.6/drivers/accel/habanalabs/common/
Dhabanalabs.h1261 #define PLL_REF_CLK 50 macro