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/kernel/linux/linux-6.6/arch/arm64/boot/dts/microchip/
Dsparx5_pcb135_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
17 compatible = "gpio-leds";
21 default-state = "off";
26 default-state = "off";
31 default-state = "off";
36 default-state = "off";
41 default-state = "off";
[all …]
Dsparx5_pcb134_board.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 gpio-restart {
11 compatible = "gpio-restart";
17 compatible = "gpio-leds";
53 default-state = "off";
58 default-state = "off";
63 default-state = "off";
68 default-state = "off";
73 default-state = "off";
[all …]
/kernel/linux/linux-6.6/drivers/scsi/isci/
Dport_config.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
72 * General port configuration agent routines
93 return -1; in sci_sas_address_compare()
97 return -1; in sci_sas_address_compare()
106 * @ihost: The controller object used for the port search.
109 * This routine will find a matching port for the phy. This means that the
110 * port and phy both have the same broadcast sas address and same received sas
111 * address. The port address or the NULL if there is no matching
[all …]
/kernel/linux/linux-5.10/drivers/scsi/isci/
Dport_config.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
72 * General port configuration agent routines
93 return -1; in sci_sas_address_compare()
97 return -1; in sci_sas_address_compare()
106 * @controller: The controller object used for the port search.
109 * This routine will find a matching port for the phy. This means that the
110 * port and phy both have the same broadcast sas address and same received sas
111 * address. The port address or the NULL if there is no matching
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
11 connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They
14 The remaining 6 PHYs are taken according to the mode of DSAF.
16 In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
17 port-id can be 2 to 7. Here is the diagram:
[all …]
Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
[all …]
Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
20 pattern: "^switch@[0-9a-f]+$"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
11 connect to 8 PHYs. Port 0 to 1 are both used for administration purpose. They
14 The remaining 6 PHYs are taken according to the mode of DSAF.
16 In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
17 port-id can be 2 to 7. Here is the diagram:
[all …]
/kernel/linux/linux-5.10/drivers/ata/
Dlibahci_platform.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2004-2005 Red Hat, Inc.
36 * ahci_platform_enable_phys - Enable PHYs
39 * This function enables all the PHYs found in hpriv->phys, if any.
40 * If a PHY fails to be enabled, it disables all the PHYs already
50 for (i = 0; i < hpriv->nports; i++) { in ahci_platform_enable_phys()
51 rc = phy_init(hpriv->phys[i]); in ahci_platform_enable_phys()
55 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); in ahci_platform_enable_phys()
57 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
61 rc = phy_power_on(hpriv->phys[i]); in ahci_platform_enable_phys()
[all …]
/kernel/linux/linux-6.6/drivers/ata/
Dlibahci_platform.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2004-2005 Red Hat, Inc.
37 * ahci_platform_enable_phys - Enable PHYs
40 * This function enables all the PHYs found in hpriv->phys, if any.
41 * If a PHY fails to be enabled, it disables all the PHYs already
51 for (i = 0; i < hpriv->nports; i++) { in ahci_platform_enable_phys()
52 rc = phy_init(hpriv->phys[i]); in ahci_platform_enable_phys()
56 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); in ahci_platform_enable_phys()
58 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
62 rc = phy_power_on(hpriv->phys[i]); in ahci_platform_enable_phys()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/xscale/
Dixp4xx_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Ethernet port config (0x00 is not present on IXP42X):
9 * logical port 0x00 0x10 0x20
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
[all …]
/kernel/linux/linux-6.6/drivers/phy/st/
Dphy-stm32-usbphyc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
150 struct stm32_usbphyc_phy **phys; member
173 ret = regulator_enable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()
177 ret = regulator_enable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_enable()
184 regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_enable()
193 ret = regulator_disable(usbphyc->vdda1v8); in stm32_usbphyc_regulators_disable()
197 ret = regulator_disable(usbphyc->vdda1v1); in stm32_usbphyc_regulators_disable()
217 * <=> PLLFRACIN = ((FVCO / (INFF*2)) - PLLNDIV) * 2^16 in stm32_usbphyc_get_pll_params()
223 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/xscale/
Dixp4xx_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Ethernet port config (0x00 is not present on IXP42X):
9 * logical port 0x00 0x10 0x20
10 * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
13 * RX-free queue 26 27 28
14 * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
17 * bits 0 -> 1 - NPE ID (RX and TX-done)
18 * bits 0 -> 2 - priority (TX, per 802.1D)
19 * bits 3 -> 4 - port ID (user-set?)
20 * bits 5 -> 31 - physical descriptor address
[all …]
/kernel/linux/linux-5.10/drivers/phy/st/
Dphy-stm32-usbphyc.c1 // SPDX-License-Identifier: GPL-2.0
71 struct stm32_usbphyc_phy **phys; member
99 * <=> PLLFRACIN = ((FVCO / (INFF*2)) - PLLNDIV) * 2^16 in stm32_usbphyc_get_pll_params()
105 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params()
109 frac = frac - (ndiv * (1 << 16)); in stm32_usbphyc_get_pll_params()
110 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params()
116 u32 clk_rate = clk_get_rate(usbphyc->clk); in stm32_usbphyc_pll_init()
122 dev_err(usbphyc->dev, "input clk freq (%dHz) out of range\n", in stm32_usbphyc_pll_init()
124 return -EINVAL; in stm32_usbphyc_pll_init()
136 writel_relaxed(usbphyc_pll, usbphyc->base + STM32_USBPHYC_PLL); in stm32_usbphyc_pll_init()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dpci.txt3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
14 - linux,pci-domain:
21 - max-link-speed:
27 - reset-gpios:
30 - supports-clkreq:
32 root port to downstream device and host bridge drivers can do programming
33 which depends on CLKREQ signal existence. For example, programming root port
34 not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dpci.txt3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
14 - linux,pci-domain:
21 - max-link-speed:
27 - reset-gpios:
30 - supports-clkreq:
32 root port to downstream device and host bridge drivers can do programming
33 which depends on CLKREQ signal existence. For example, programming root port
34 not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
[all …]
/kernel/linux/linux-6.6/arch/powerpc/sysdev/
Dfsl_rmu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * - fixed maintenance access routines, check for aligned access
11 * - Added Port-Write message handling
12 * - Added Machine Check exception handling
16 * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
24 #include <linux/dma-mapping.h>
33 (((struct rio_priv *)(mport->priv))->rmm_handle)
35 /* RapidIO definition irq, which read from OF-tree */
36 #define IRQ_RIO_PW(m) (((struct fsl_rio_pw *)(m))->pwirq)
37 #define IRQ_RIO_BELL(m) (((struct fsl_rio_dbell *)(m))->bellirq)
[all …]
/kernel/linux/linux-6.6/sound/soc/qcom/qdsp6/
Dq6apm.c1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/soc/qcom,gpr.h>
16 #include <sound/soc-dapm.h>
34 gpr_device_t *gdev = apm->gdev; in q6apm_send_cmd_sync()
36 return audioreach_send_cmd_sync(&gdev->dev, gdev, &apm->result, &apm->lock, in q6apm_send_cmd_sync()
37 NULL, &apm->wait, pkt, rsp_opcode); in q6apm_send_cmd_sync()
46 mutex_lock(&apm->lock); in q6apm_get_audioreach_graph()
47 graph = idr_find(&apm->graph_idr, graph_id); in q6apm_get_audioreach_graph()
48 mutex_unlock(&apm->lock); in q6apm_get_audioreach_graph()
51 kref_get(&graph->refcount); in q6apm_get_audioreach_graph()
[all …]
Dq6asm.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
21 #include "q6dsp-errno.h"
22 #include "q6dsp-common.h"
241 phys_addr_t phys; member
270 /* idx:1 out port, 0: in port */
271 struct audio_port_data port[2]; member
283 hdr->hdr_field = APR_SEQ_CMD_HDR_FIELD; in q6asm_add_hdr()
284 hdr->src_port = ((ac->session << 8) & 0xFF00) | (stream_id); in q6asm_add_hdr()
285 hdr->dest_port = ((ac->session << 8) & 0xFF00) | (stream_id); in q6asm_add_hdr()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
18 A glue connects the DWC3 core to USB2 PHYs and optionally to an USB3 PHY.
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/xlnx/
Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dahci-platform.txt3 SATA nodes are defined to describe on-chip Serial ATA controllers.
6 It is possible, but not required, to represent each port as a sub-node.
7 It allows to enable each port independently when dealing with multiple
8 PHYs.
11 - compatible : compatible string, one of:
12 - "brcm,iproc-ahci"
13 - "hisilicon,hisi-ahci"
14 - "cavium,octeon-7130-ahci"
15 - "ibm,476gtr-ahci"
16 - "marvell,armada-380-ahci"
[all …]
/kernel/linux/linux-5.10/sound/soc/qcom/qdsp6/
Dq6asm.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
21 #include "q6dsp-errno.h"
22 #include "q6dsp-common.h"
241 phys_addr_t phys; member
270 /* idx:1 out port, 0: in port */
271 struct audio_port_data port[2]; member
283 hdr->hdr_field = APR_SEQ_CMD_HDR_FIELD; in q6asm_add_hdr()
284 hdr->src_port = ((ac->session << 8) & 0xFF00) | (stream_id); in q6asm_add_hdr()
285 hdr->dest_port = ((ac->session << 8) & 0xFF00) | (stream_id); in q6asm_add_hdr()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/sysdev/
Dfsl_rmu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * - fixed maintenance access routines, check for aligned access
11 * - Added Port-Write message handling
12 * - Added Machine Check exception handling
16 * Lian Minghuan-B31939 <Minghuan.Lian@freescale.com>
24 #include <linux/dma-mapping.h>
33 (((struct rio_priv *)(mport->priv))->rmm_handle)
35 /* RapidIO definition irq, which read from OF-tree */
36 #define IRQ_RIO_PW(m) (((struct fsl_rio_pw *)(m))->pwirq)
37 #define IRQ_RIO_BELL(m) (((struct fsl_rio_dbell *)(m))->bellirq)
[all …]

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