Searched +full:ports +full:- +full:implemented (Results 1 – 25 of 525) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soundwire/ |
| D | qcom,soundwire.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
21 - qcom,soundwire-v1.5.1
22 - qcom,soundwire-v1.6.0
23 - qcom,soundwire-v1.7.0
[all …]
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| /kernel/linux/linux-6.6/Documentation/networking/dsa/ |
| D | lan9303.rst | 6 the two external ethernet ports. The third port is an RMII/MII interface to a
13 The driver is implemented as a DSA driver, see ``Documentation/networking/dsa/dsa.rst``.
24 When both user ports are joined to the same bridge, the normal HW MAC learning
29 If one of the user ports leave the bridge, the ports goes back to the initial
36 - Support for VLAN filtering is not implemented
37 - The HW does not support VLAN-specific fdb entries
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| /kernel/linux/linux-5.10/Documentation/networking/dsa/ |
| D | lan9303.rst | 6 the two external ethernet ports. The third port is an RMII/MII interface to a
13 The driver is implemented as a DSA driver, see ``Documentation/networking/dsa/dsa.rst``.
24 When both user ports are joined to the same bridge, the normal HW MAC learning
29 If one of the user ports leave the bridge, the ports goes back to the initial
36 - Support for VLAN filtering is not implemented
37 - The HW does not support VLAN-specific fdb entries
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/ |
| D | rockchip,dwc-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Serge Semin <fancer.lancer@gmail.com>
22 - rockchip,rk3568-dwc-ahci
23 - rockchip,rk3588-dwc-ahci
25 - compatible
30 - enum:
31 - rockchip,rk3568-dwc-ahci
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| D | baikal,bt1-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 SoC AHCI SATA controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
14 DWC AHCI SATA v4.10a IP-core.
17 - $ref: snps,dwc-ahci-common.yaml#
21 const: baikal,bt1-ahci
[all …]
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| D | ahci-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hans de Goede <hdegoede@redhat.com>
11 - Damien Le Moal <dlemoal@kernel.org>
18 document doesn't constitute a DT-node binding by itself but merely
19 defines a set of common properties for the AHCI-compatible devices.
24 - $ref: sata-common.yaml#
32 reg-names:
[all …]
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| D | ahci-mtk.txt | 4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
5 When using "mediatek,mtk-ahci" compatible strings, you
7 - "mediatek,mt7622-ahci"
8 - reg : Physical base addresses and length of register sets.
9 - interrupts : Interrupt associated with the SATA device.
10 - interrupt-names : Associated name must be: "hostc".
11 - clocks : A list of phandle and clock specifier pairs, one for each
12 entry in clock-names.
13 - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm".
14 - phys : A phandle and PHY specifier pair for the PHY port.
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/ |
| D | nvidia,tegra186-gpio.txt | 31 implemented by the SoC. Each GPIO is assigned to a port, and a port may control
36 The number of ports implemented by each GPIO controller varies. The number of
37 implemented GPIOs within each port varies. GPIO registers within a controller
42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
43 describes the port-level mapping. In that file, the naming convention for ports
49 represents the aggregate status for all GPIOs within a set of ports. Thus, the
51 of the number of ports it implements. Note that the HW documentation refers to
52 both the overall controller HW module and the sets-of-ports as "controllers".
55 of ports. Each GPIO may be configured to feed into a specific one of the
56 interrupt signals generated by a set-of-ports. The intent is for each generated
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | nvidia,tegra186-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
42 implemented by the SoC. Each GPIO is assigned to a port, and a port may
47 The number of ports implemented by each GPIO controller varies. The number
48 of implemented GPIOs within each port varies. GPIO registers within a
53 controller, are both extremely non-linear. The header file
[all …]
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| /kernel/linux/linux-6.6/drivers/scsi/mvsas/ |
| D | mv_64xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
21 MVS_GBL_PI = 0x0C, /* ports implemented bitmask */
24 MVS_PORTS_IMP = 0x9C, /* SOC Port Implemented */
53 /* ports 1-3 follow after this */
56 /* ports 5-7 follow after this */
60 /* ports 1-3 follow after this */
62 /* ports 5-7 follow after this */
68 /* ports 1-3 follow after this */
71 /* ports 5-7 follow after this */
[all …]
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| /kernel/linux/linux-5.10/drivers/scsi/mvsas/ |
| D | mv_64xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
21 MVS_GBL_PI = 0x0C, /* ports implemented bitmask */
24 MVS_PORTS_IMP = 0x9C, /* SOC Port Implemented */
53 /* ports 1-3 follow after this */
56 /* ports 5-7 follow after this */
60 /* ports 1-3 follow after this */
62 /* ports 5-7 follow after this */
68 /* ports 1-3 follow after this */
71 /* ports 5-7 follow after this */
[all …]
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| /kernel/linux/linux-5.10/Documentation/hwmon/ |
| D | it87.rst | 10 Addresses scanned: from Super I/O config space (8 I/O ports)
18 Addresses scanned: from Super I/O config space (8 I/O ports)
24 Addresses scanned: from Super I/O config space (8 I/O ports)
32 Addresses scanned: from Super I/O config space (8 I/O ports)
40 Addresses scanned: from Super I/O config space (8 I/O ports)
48 Addresses scanned: from Super I/O config space (8 I/O ports)
56 Addresses scanned: from Super I/O config space (8 I/O ports)
64 Addresses scanned: from Super I/O config space (8 I/O ports)
72 Addresses scanned: from Super I/O config space (8 I/O ports)
80 Addresses scanned: from Super I/O config space (8 I/O ports)
[all …]
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| /kernel/linux/linux-6.6/Documentation/networking/devlink/ |
| D | netdevsim.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 .. list-table:: Generic parameters implemented
15 * - Name
16 - Mode
17 * - ``max_macs``
18 - driverinit
20 The ``netdevsim`` driver also implements the following driver-specific
23 .. list-table:: Driver-specific parameters implemented
26 * - Name
27 - Type
[all …]
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| D | mlx5.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 This document describes the devlink features implemented by the ``mlx5``
13 .. list-table:: Generic parameters implemented
15 * - Name
16 - Mode
17 - Validation
18 * - ``enable_roce``
19 - driverinit
20 - Type: Boolean
26 * - ``io_eq_size``
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | cdns,csi2tx.txt | 1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
8 - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
9 for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
10 - reg: base address and size of the memory mapped region
11 - clocks: phandles to the clocks driving the controller
12 - clock-names: must contain:
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
16 implemented in hardware, between 0 and 3
19 - phys: phandle to the D-PHY. If it is set, phy-names need to be set
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/ |
| D | cdns,csi2rx.txt | 1 Cadence MIPI-CSI2 RX controller
4 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
8 - compatible: must be set to "cdns,csi2rx" and an SoC-specific compatible
9 - reg: base address and size of the memory mapped region
10 - clocks: phandles to the clocks driving the controller
11 - clock-names: must contain:
14 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
15 implemented in hardware, between 0 and 3
18 - phys: phandle to the external D-PHY, phy-names must be provided
19 - phy-names: must contain "dphy", if the implementation uses an
[all …]
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| D | cdns,csi2tx.txt | 1 Cadence MIPI-CSI2 TX controller
4 The Cadence MIPI-CSI2 TX controller is a CSI-2 bridge supporting up to
8 - compatible: must be set to "cdns,csi2tx" or "cdns,csi2tx-1.3"
9 for version 1.3 of the controller, "cdns,csi2tx-2.1" for v2.1
10 - reg: base address and size of the memory mapped region
11 - clocks: phandles to the clocks driving the controller
12 - clock-names: must contain:
15 * pixel_if[0-3]_clk: pixel stream output clock, one for each stream
16 implemented in hardware, between 0 and 3
19 - phys: phandle to the D-PHY. If it is set, phy-names need to be set
[all …]
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| /kernel/linux/linux-6.6/Documentation/hwmon/ |
| D | it87.rst | 10 Addresses scanned: from Super I/O config space (8 I/O ports)
18 Addresses scanned: from Super I/O config space (8 I/O ports)
24 Addresses scanned: from Super I/O config space (8 I/O ports)
32 Addresses scanned: from Super I/O config space (8 I/O ports)
40 Addresses scanned: from Super I/O config space (8 I/O ports)
48 Addresses scanned: from Super I/O config space (8 I/O ports)
56 Addresses scanned: from Super I/O config space (8 I/O ports)
64 Addresses scanned: from Super I/O config space (8 I/O ports)
72 Addresses scanned: from Super I/O config space (8 I/O ports)
80 Addresses scanned: from Super I/O config space (8 I/O ports)
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/ |
| D | ahci-mtk.txt | 4 - compatible : Must be "mediatek,<chip>-ahci", "mediatek,mtk-ahci".
5 When using "mediatek,mtk-ahci" compatible strings, you
7 - "mediatek,mt7622-ahci"
8 - reg : Physical base addresses and length of register sets.
9 - interrupts : Interrupt associated with the SATA device.
10 - interrupt-names : Associated name must be: "hostc".
11 - clocks : A list of phandle and clock specifier pairs, one for each
12 entry in clock-names.
13 - clock-names : Associated names must be: "ahb", "axi", "asic", "rbc", "pm".
14 - phys : A phandle and PHY specifier pair for the PHY port.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,eud.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Souradeep Chowdhury <quic_schowdhu@quicinc.com>
14 mini USB-hub implemented on chip to support USB-based debug capabilities.
19 - enum:
20 - qcom,sc7280-eud
21 - const: qcom,eud
25 - description: EUD Base Register Region
26 - description: EUD Mode Manager Register
[all …]
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| /kernel/linux/linux-5.10/Documentation/arm/sa1100/ |
| D | assabet.rst | 2 The Intel Assabet (SA-1110 evaluation) board
13 -------------------
25 -----------------------
39 John Dorsey has produced add-on patches to add support for Assabet and
55 - ftp://ftp.netwinder.org/users/n/nico/
56 - ftp://ftp.arm.linux.org.uk/pub/linux/arm/people/nico/
57 - ftp://ftp.handhelds.org/pub/linux/arm/sa-1100-patches/
59 Look for redboot-assabet*.tgz. Some installation infos are provided in
60 redboot-assabet*.txt.
64 -----------------------------
[all …]
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| /kernel/linux/linux-6.6/Documentation/arch/arm/sa1100/ |
| D | assabet.rst | 2 The Intel Assabet (SA-1110 evaluation) board
13 -------------------
25 -----------------------
39 John Dorsey has produced add-on patches to add support for Assabet and
55 - ftp://ftp.netwinder.org/users/n/nico/
56 - ftp://ftp.arm.linux.org.uk/pub/linux/arm/people/nico/
57 - ftp://ftp.handhelds.org/pub/linux/arm/sa-1100-patches/
59 Look for redboot-assabet*.tgz. Some installation infos are provided in
60 redboot-assabet*.txt.
64 -----------------------------
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ |
| D | arm,coresight-dummy-sink.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-dummy-sink.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
19 Qualcomm platforms. It is a mini-USB hub implemented to support the USB-based
31 - Mike Leach <mike.leach@linaro.org>
32 - Suzuki K Poulose <suzuki.poulose@arm.com>
33 - James Clark <james.clark@arm.com>
34 - Mao Jinlong <quic_jinlmao@quicinc.com>
35 - Hao Zhang <quic_hazha@quicinc.com>
[all …]
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| /kernel/linux/linux-6.6/Documentation/i2c/busses/ |
| D | i2c-amd8111.rst | 2 Kernel driver i2c-adm8111
6 * AMD-8111 SMBus 2.0 PCI interface
16 -----------
20 00:07.2 SMBus: Advanced Micro Devices [AMD] AMD-8111 SMBus 2.0 (rev 02)
21 Subsystem: Advanced Micro Devices [AMD] AMD-8111 SMBus 2.0
23 I/O ports at d400 [size=32]
25 in your ``lspci -v``, then this driver is for your chipset.
28 --------------------
33 -----------------
35 Supported. Both PEC and block process call support is implemented. Slave
[all …]
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| /kernel/linux/linux-5.10/Documentation/i2c/busses/ |
| D | i2c-amd8111.rst | 2 Kernel driver i2c-adm8111
6 * AMD-8111 SMBus 2.0 PCI interface
16 -----------
20 00:07.2 SMBus: Advanced Micro Devices [AMD] AMD-8111 SMBus 2.0 (rev 02)
21 Subsystem: Advanced Micro Devices [AMD] AMD-8111 SMBus 2.0
23 I/O ports at d400 [size=32]
25 in your ``lspci -v``, then this driver is for your chipset.
28 --------------------
33 -----------------
35 Supported. Both PEC and block process call support is implemented. Slave
[all …]
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