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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dfsl-fec.txt4 - compatible : Should be "fsl,<soc>-fec"
5 - reg : Address and length of the register set for the device
6 - interrupts : Should contain fec interrupt
7 - phy-mode : See ethernet.txt file in the same directory
10 - phy-supply : regulator that powers the Ethernet PHY.
11 - phy-handle : phandle to the PHY device connected to this device.
12 - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13 Use instead of phy-handle.
14 - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
17 - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: pwm-backlight bindings
10 - Lee Jones <lee.jones@linaro.org>
11 - Daniel Thompson <daniel.thompson@linaro.org>
12 - Jingoo Han <jingoohan1@gmail.com>
16 const: pwm-backlight
21 pwm-names: true
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: pwm-backlight
10 - Lee Jones <lee@kernel.org>
11 - Daniel Thompson <daniel.thompson@linaro.org>
12 - Jingoo Han <jingoohan1@gmail.com>
16 const: pwm-backlight
21 pwm-names: true
[all …]
/kernel/liteos_a/testsuites/kernel/sample/kernel_base/ipc/mux/smp/
DIt_smp_los_mux_2018.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
57 dprintf("task f01 post mux\n"); in TaskF01()
78 dprintf("task f02 post mux\n"); in TaskF02()
120 TestBusyTaskDelay(2); // 2, delay for Timing control. in Testcase()
122 ret = OS_TCB_FROM_TID(g_testTaskID01)->taskStatus; in Testcase()
125 ret = OS_TCB_FROM_TID(g_testTaskID02)->taskStatus; in Testcase()
131 LOS_TaskDelay(10); // 10, delay for Timing control. in Testcase()
135 ret = OS_TCB_FROM_TID(g_testTaskID01)->taskStatus; in Testcase()
144 g_flag1 = 0; // mux post in task f01 in Testcase()
[all …]
DIt_smp_los_mux_2015.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
68 PRINT_DEBUG("delay in task f02\n"); in TaskF02()
69 LOS_TaskDelay(10); // 10, delay for Timing control. in TaskF02()
72 PRINT_DEBUG("post mux in task f02\n"); in TaskF02()
81 PRINT_DEBUG("after post in hwi \n"); in HwiF01()
118 TEST_TASK_PARAM_INIT_AFFI(testTask, "it_MUX_2015_task2", TaskF02, TASK_PRIO_TEST_TASK - 1, in Testcase()
141 PRINT_DEBUG("delay in testtask begin\n"); in Testcase()
142 LOS_TaskDelay(20); // 20, delay for Timing control. in Testcase()
143 PRINT_DEBUG("delay in testtask end\n"); in Testcase()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/
Dhid-over-i2c.txt1 * HID over I2C Device-Tree bindings
8 http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
10 If this binding is used, the kernel module i2c-hid will handle the communication
14 - compatible: must be "hid-over-i2c"
15 - reg: i2c slave address
16 - hid-descr-addr: HID descriptor address
17 - interrupts: interrupt line
23 device-specific compatible properties, which should be used in addition to the
24 "hid-over-i2c" string.
26 - compatible:
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Wei Fang <wei.fang@nxp.com>
12 - NXP Linux Team <linux-imx@nxp.com>
15 - $ref: ethernet-controller.yaml#
20 - enum:
21 - fsl,imx25-fec
22 - fsl,imx27-fec
[all …]
Dmdio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
17 bus. These should follow the generic ethernet-phy.yaml document, or
24 "#address-cells":
27 "#size-cells":
30 reset-gpios:
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/kernel/linux/linux-5.10/drivers/mmc/core/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/delay.h>
75 void _mmc_detect_change(struct mmc_host *host, unsigned long delay,
123 * mmc_claim_host - exclusively claim a host
138 * mmc_pre_req - Prepare for a new request
148 if (host->ops->pre_req) in mmc_pre_req()
149 host->ops->pre_req(host, mrq); in mmc_pre_req()
153 * mmc_post_req - Post process a completed request
154 * @host: MMC host to post process command
155 * @mrq: MMC request to post process for
[all …]
/kernel/linux/linux-6.6/drivers/mmc/core/
Dcore.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/delay.h>
76 void _mmc_detect_change(struct mmc_host *host, unsigned long delay,
141 * mmc_claim_host - exclusively claim a host
156 * mmc_pre_req - Prepare for a new request
166 if (host->ops->pre_req) in mmc_pre_req()
167 host->ops->pre_req(host, mrq); in mmc_pre_req()
171 * mmc_post_req - Post process a completed request
172 * @host: MMC host to post process command
173 * @mrq: MMC request to post process for
[all …]
/kernel/liteos_a/testsuites/kernel/sample/kernel_base/ipc/sem/smp/
DIt_smp_los_sem_030.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
50 for (i = 0; i < TRandom() % 500; i++) { // Gets a random value of 0-500 in TaskF01()
56 for (i = 0; i < TRandom() % 500; i++) { // Gets a random value of 0-500 in TaskF01()
62 for (i = 0; i < TRandom() % 500; i++) { // Gets a random value of 0-500 in TaskF01()
97 LOS_TaskDelay(10); // 10, delay enouge time in Testcase()
100 …(g_ret1 == LOS_OK) && (g_ret2 == LOS_OK) && (g_ret3 == LOS_OK)) { // pend-post-del ///post-pend-del in Testcase()
102 (g_ret3 == LOS_OK)) { // del-pend-post//del-post-pend in Testcase()
103 …(g_ret1 == LOS_OK) && (g_ret2 == LOS_OK) && (g_ret3 == LOS_ERRNO_SEM_PENDED)) { // pend-delete-post in Testcase()
104 … ((g_ret1 == LOS_ERRNO_SEM_INVALID) && (g_ret2 == LOS_OK) && (g_ret3 == LOS_OK)) { // post-del-pend in Testcase()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dgen6_engine_cs.c1 // SPDX-License-Identifier: MIT
17 * Emits a PIPE_CONTROL with a non-zero post-sync operation, for
21 * [DevSNB-C+{W/A}] Before any depth stall flush (including those
22 * produced by non-pipelined state commands), software needs to first
23 * send a PIPE_CONTROL with no bits set except Post-Sync Operation !=
26 * [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache Flush Enable
27 * =1, a PIPE_CONTROL with any non-zero post-sync-op is required.
31 * [Dev-SNB{W/A}]: Pipe-control with CS-stall bit set must be sent
32 * BEFORE the pipe-control with a post-sync op and no write-cache
40 * - Render Target Cache Flush Enable ([12] of DW1)
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
Dgen6_engine_cs.c1 // SPDX-License-Identifier: MIT
18 * Emits a PIPE_CONTROL with a non-zero post-sync operation, for
22 * [DevSNB-C+{W/A}] Before any depth stall flush (including those
23 * produced by non-pipelined state commands), software needs to first
24 * send a PIPE_CONTROL with no bits set except Post-Sync Operation !=
27 * [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache Flush Enable
28 * =1, a PIPE_CONTROL with any non-zero post-sync-op is required.
32 * [Dev-SNB{W/A}]: Pipe-control with CS-stall bit set must be sent
33 * BEFORE the pipe-control with a post-sync op and no write-cache
41 * - Render Target Cache Flush Enable ([12] of DW1)
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
25 stdout-path = "serial0:115200n8";
30 regulators-2 {
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_init.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2009-2013 QLogic Corporation
74 u16 delay; member
78 u16 delay;
136 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE); in qlcnic_83xx_idc_check_driver_presence_reg()
146 cur = adapter->ahw->idc.curr_state; in qlcnic_83xx_idc_log_state_history()
147 prev = adapter->ahw->idc.prev_state; in qlcnic_83xx_idc_log_state_history()
149 dev_info(&adapter->pdev->dev, in qlcnic_83xx_idc_log_state_history()
151 adapter->ahw->idc.name[cur], in qlcnic_83xx_idc_log_state_history()
152 adapter->ahw->idc.name[prev]); in qlcnic_83xx_idc_log_state_history()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_init.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2009-2013 QLogic Corporation
74 u16 delay; member
78 u16 delay;
136 val = QLCRDX(adapter->ahw, QLC_83XX_IDC_DRV_PRESENCE); in qlcnic_83xx_idc_check_driver_presence_reg()
146 cur = adapter->ahw->idc.curr_state; in qlcnic_83xx_idc_log_state_history()
147 prev = adapter->ahw->idc.prev_state; in qlcnic_83xx_idc_log_state_history()
149 dev_info(&adapter->pdev->dev, in qlcnic_83xx_idc_log_state_history()
151 adapter->ahw->idc.name[cur], in qlcnic_83xx_idc_log_state_history()
152 adapter->ahw->idc.name[prev]); in qlcnic_83xx_idc_log_state_history()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/ci/
Dgitlab-ci.yml2 DRM_CI_PROJECT_PATH: &drm-ci-project-path mesa/mesa
3 DRM_CI_COMMIT_SHA: &drm-ci-commit-sha edfbf74df1d4d6ce54ffe24566108be0e1a98c3d
6 TARGET_BRANCH: drm-next
10 DEQP_RUNNER_GIT_URL: https://gitlab.freedesktop.org/anholt/deqp-runner.git
13 FDO_UPSTREAM_REPO: helen.fornazier/linux # The repo where the git-archive daily runs
14 MESA_TEMPLATES_COMMIT: &ci-templates-commit d5aa3941aa03c2f716595116354fb81eb8012acb
16 CI_PRE_CLONE_SCRIPT: |-
17 set -o xtrace
18 …-L --retry 4 -f --retry-all-errors --retry-delay 60 -s ${DRM_CI_PROJECT_URL}/-/raw/${DRM_CI_COMMIT…
19 bash download-git-cache.sh
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
7 #include <linux/delay.h>
9 #include <linux/dma-mapping.h>
27 #include <linux/platform_data/dma-imx.h>
123 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
128 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
133 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
138 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
144 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
35 clock-names:
[all …]
/kernel/linux/linux-6.6/drivers/hid/i2c-hid/
Di2c-hid-of.c12 * Copyright (c) 2000-2005 Vojtech Pavlik <vojtech@suse.cz>
13 * Copyright (c) 2005 Michael Haboustak <mike-@cinci.rr.com> for Concept2, Inc
14 * Copyright (c) 2007-2008 Oliver Neukum
15 * Copyright (c) 2006-2010 Jiri Kosina
22 #include <linux/delay.h>
33 #include "i2c-hid.h"
48 struct device *dev = &ihid_of->client->dev; in i2c_hid_of_power_up()
51 ret = regulator_bulk_enable(ARRAY_SIZE(ihid_of->supplies), in i2c_hid_of_power_up()
52 ihid_of->supplies); in i2c_hid_of_power_up()
58 if (ihid_of->post_power_delay_ms) in i2c_hid_of_power_up()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8183-kukui-jacuzzi-burnet.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi.dtsi"
8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi"
12 chassis-type = "convertible";
17 mediatek,dmic-mode = <1>; /* one-wire */
22 compatible = "hid-over-i2c";
24 pinctrl-names = "default";
25 pinctrl-0 = <&touchscreen_pins>;
26 interrupts-extended = <&pio 155 IRQ_TYPE_LEVEL_LOW>;
[all …]
Dmt8183-kukui-jacuzzi-damu.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "mt8183-kukui-jacuzzi.dtsi"
8 #include "mt8183-kukui-audio-da7219-max98357a.dtsi"
12 chassis-type = "convertible";
19 compatible = "hid-over-i2c";
21 interrupt-parent = <&pio>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&touchscreen_pins>;
26 post-power-on-delay-ms = <10>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
35 clock-names:
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-imx.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
8 #include <linux/delay.h>
10 #include <linux/dma-mapping.h>
26 #include <linux/dma/imx-dma.h>
133 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi()
138 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi()
143 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi()
148 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi()
154 unsigned int val = readl(spi_imx->base + MXC_CSPIRXDATA); \
[all …]

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