| /kernel/linux/linux-5.10/arch/arm/mach-pxa/include/mach/ |
| D | pxa2xx-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * arch/arm/mach-pxa/include/mach/pxa2xx-regs.h 5 * Taken from pxa-regs.h by Russell King 17 * Power Manager 20 #define PMCR __REG(0x40F00000) /* Power Manager Control Register */ 21 #define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */ 22 #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */ 23 #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */ 24 #define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */ 25 #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ [all …]
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| D | pxa3xx-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * arch/arm/mach-pxa/include/mach/pxa3xx-regs.h 24 * Service Power Management Unit (MPMU) 26 #define PMCR __REG(0x40F50000) /* Power Manager Control Register */ 27 #define PSR __REG(0x40F50004) /* Power Manager S2 Status Register */ 28 #define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */ 29 #define PCFR __REG(0x40F5000C) /* Power Manager General Configuration Register */ 30 #define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */ 31 #define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */ 32 #define PECR __REG(0x40F50018) /* Power Manager EXT_WAKEUP[1:0] Control Register */ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 4 - compatible: Should be one of 7 - reg: SPI chip select numbert for the device 8 - spi-max-frequency: Max SPI frequency to use (< 20000000) 9 - clocks: From common clock binding. Clock is phandle to clock for 13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number, 15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS). 16 - adi,power-up-frequency: If set in Hz the PLL tunes to 17 the desired frequency on probe. 18 - adi,reference-div-factor: If set the driver skips dynamic calculation 20 - adi,reference-doubler-enable: Enables reference doubler. [all …]
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| /kernel/linux/linux-6.6/drivers/staging/sm750fb/ |
| D | ddk750_chip.c | 1 // SPDX-License-Identifier: GPL-2.0 52 * This function set up the main chip clock. 54 * Input: Frequency to be set. 56 static void set_chip_clock(unsigned int frequency) in set_chip_clock() argument 64 if (frequency) { in set_chip_clock() 66 * Set up PLL structure to hold the value to be set in clocks. in set_chip_clock() 74 * up the exact clock required by the User. in set_chip_clock() 78 sm750_calc_pll_value(frequency, &pll); in set_chip_clock() 85 static void set_memory_clock(unsigned int frequency) in set_memory_clock() argument 96 if (frequency) { in set_memory_clock() [all …]
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| /kernel/linux/linux-5.10/drivers/staging/sm750fb/ |
| D | ddk750_chip.c | 1 // SPDX-License-Identifier: GPL-2.0 52 * This function set up the main chip clock. 54 * Input: Frequency to be set. 56 static void set_chip_clock(unsigned int frequency) in set_chip_clock() argument 64 if (frequency) { in set_chip_clock() 66 * Set up PLL structure to hold the value to be set in clocks. in set_chip_clock() 74 * up the exact clock required by the User. in set_chip_clock() 78 sm750_calc_pll_value(frequency, &pll); in set_chip_clock() 85 static void set_memory_clock(unsigned int frequency) in set_memory_clock() argument 96 if (frequency) { in set_memory_clock() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | debugfs_gt_pm.c | 1 // SPDX-License-Identifier: MIT 23 struct intel_gt *gt = m->private; in fw_domains_show() 24 struct intel_uncore *uncore = gt->uncore; in fw_domains_show() 29 uncore->user_forcewake_count); in fw_domains_show() 33 intel_uncore_forcewake_domain_to_str(fw_domain->id), in fw_domains_show() 34 READ_ONCE(fw_domain->wake_count)); in fw_domains_show() 44 struct intel_gt *gt = m->private; in print_rc6_res() 47 with_intel_runtime_pm(gt->uncore->rpm, wakeref) in print_rc6_res() 49 intel_uncore_read(gt->uncore, reg), in print_rc6_res() 50 intel_rc6_residency_us(>->rc6, reg)); in print_rc6_res() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| D | smu_v13_0_4_ppsmc.h | 27 /*! @mainpage PMFW-PPS (PPLib) Message Interface 59 #define PPSMC_MSG_PowerDownVcn 0x06 ///< Power down VCN 60 #define PPSMC_MSG_PowerUpVcn 0x07 ///< Power up VCN; VCN is power gated by defau… 62 …MC_MSG_SetSoftMinGfxclk 0x09 ///< Set SoftMin for GFXCLK, argument is frequency in MHz 78 #define PPSMC_MSG_GetGfxclkFrequency 0x17 ///< Get GFX clock frequency 79 #define PPSMC_MSG_GetFclkFrequency 0x18 ///< Get FCLK frequency 88 #define PPSMC_MSG_SetPowerLimitPercentage 0x20 ///< Set power limit percentage 89 #define PPSMC_MSG_PowerDownJpeg 0x21 ///< Power down Jpeg 90 #define PPSMC_MSG_PowerUpJpeg 0x22 ///< Power up Jpeg; VCN is power gated by defa… 98 #define PPSMC_MSG_PowerDownIspByTile 0x29 ///< ISP is power gated by default [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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| D | zynqmp-sck-kv-g-revB.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/net/ti-dp83867.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 /dts-v1/; 20 si5332_0: si5332-0 { /* u17 */ 21 compatible = "fixed-clock"; [all …]
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| D | zynqmp-sck-kv-g-revA.dtso | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 9 * "A" - A01 board un-modified (NXP) 10 * "Y" - A01 board modified with legacy interposer (Nexperia) 11 * "Z" - A01 board modified with Diode interposer 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/net/ti-dp83867.h> 18 #include <dt-bindings/phy/phy.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> [all …]
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| D | zynqmp-zc1751-xm016-dc2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm016-dc2 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm016-dc2 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; [all …]
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| /kernel/linux/linux-5.10/tools/power/cpupower/man/ |
| D | cpupower-monitor.1 | 1 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual" 3 cpupower\-monitor \- Report processor frequency and idle statistics 7 .RB "\-l" 10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ] 11 .RB [ "\-i seconds" ] 14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ] 18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power 22 \fBcpupower-monitor \fP implements independent processor sleep state and 23 frequency counters. Some are retrieved from kernel statistics, some are 24 directly reading out hardware registers. Use \-l to get an overview which are [all …]
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| /kernel/linux/linux-6.6/tools/power/cpupower/man/ |
| D | cpupower-monitor.1 | 1 .TH CPUPOWER\-MONITOR "1" "22/02/2011" "" "cpupower Manual" 3 cpupower\-monitor \- Report processor frequency and idle statistics 7 .RB "\-l" 10 .RB [ -c ] [ "\-m <mon1>," [ "<mon2>,..." ] ] 11 .RB [ "\-i seconds" ] 14 .RB [ -c ][ "\-m <mon1>," [ "<mon2>,..." ] ] 18 \fBcpupower-monitor \fP reports processor topology, frequency and idle power 22 \fBcpupower-monitor \fP implements independent processor sleep state and 23 frequency counters. Some are retrieved from kernel statistics, some are 24 directly reading out hardware registers. Use \-l to get an overview which are [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,adf4350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Hennerich <michael.hennerich@analog.com> 15 - adi,adf4350 16 - adi,adf4351 21 spi-max-frequency: 28 clock-names: 35 adi,channel-spacing: [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| D | intel_gt_pm_debugfs.c | 1 // SPDX-License-Identifier: MIT 29 atomic_inc(>->user_wakeref); in intel_gt_pm_debugfs_forcewake_user_open() 31 if (GRAPHICS_VER(gt->i915) >= 6) in intel_gt_pm_debugfs_forcewake_user_open() 32 intel_uncore_forcewake_user_get(gt->uncore); in intel_gt_pm_debugfs_forcewake_user_open() 37 if (GRAPHICS_VER(gt->i915) >= 6) in intel_gt_pm_debugfs_forcewake_user_release() 38 intel_uncore_forcewake_user_put(gt->uncore); in intel_gt_pm_debugfs_forcewake_user_release() 40 atomic_dec(>->user_wakeref); in intel_gt_pm_debugfs_forcewake_user_release() 45 struct intel_gt *gt = inode->i_private; in forcewake_user_open() 54 struct intel_gt *gt = inode->i_private; in forcewake_user_release() 69 struct intel_gt *gt = m->private; in fw_domains_show() [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/ |
| D | nxp,sja1000.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Wolfgang Grandegger <wg@grandegger.com> 15 - enum: 16 - nxp,sja1000 17 - technologic,sja1000 18 - items: 19 - enum: 20 - renesas,r9a06g032-sja1000 # RZ/N1D [all …]
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| /kernel/linux/linux-6.6/Documentation/scheduler/ |
| D | sched-util-clamp.rst | 1 .. SPDX-License-Identifier: GPL-2.0 18 used, util clamp will influence the CPU frequency selection as well. 45 dropped. It can also dynamically 'prime' up these tasks if it knows in the 57 foreground, top-app, etc. Util clamp can be used to constrain how much 60 the ones belonging to the currently active app (top-app group). Beside this 61 helps in limiting how much power they consume. This can be more obvious in 65 1. The big cores are free to run top-app tasks immediately. top-app 68 2. They don't run on a power hungry core and drain battery even if they 82 Another use case is to help with **overcoming the ramp up latency inherit in 89 higher frequency required for the tasks to finish their work in time. Setting [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 32 power-supply = <&ppvar_sys>; [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/thermal/ |
| D | cpu-idle-cooling.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 ---------- 13 act on a cooling device to mitigate the dissipated power. When the 20 to the static leakage. The only solution is to power down the 24 Last but not least, the system can ask for a specific power budget but 25 because of the OPP density, we can only choose an OPP with a power 26 budget lower than the requested one and under-utilize the CPU, thus 27 losing performance. In other words, one OPP under-utilizes the CPU 28 with a power less than the requested power budget and the next OPP 29 exceeds the power budget. An intermediate OPP could have been used if [all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/thermal/ |
| D | cpu-idle-cooling.rst | 1 .. SPDX-License-Identifier: GPL-2.0 8 ---------- 13 act on a cooling device to mitigate the dissipated power. When the 20 to the static leakage. The only solution is to power down the 24 Last but not least, the system can ask for a specific power budget but 25 because of the OPP density, we can only choose an OPP with a power 26 budget lower than the requested one and under-utilize the CPU, thus 27 losing performance. In other words, one OPP under-utilizes the CPU 28 with a power less than the requested power budget and the next OPP 29 exceeds the power budget. An intermediate OPP could have been used if [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/jaketown/ |
| D | uncore-power.json | 78 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 86 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 94 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 102 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 110 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 118 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 126 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 134 …"PublicDescription": "Counts the number of times when a configurable cores had a C-state demotion", 138 "BriefDescription": "Frequency Residency", 142 …frequency greater than or equal to the frequency that is configured in the filter. One can use al… [all …]
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/ |
| D | jh7110-starfive-visionfive-2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 9 #include "jh7110-pinfunc.h" 10 #include <dt-bindings/gpio/gpio.h> 26 stdout-path = "serial0:115200n8"; 30 timebase-frequency = <4000000>; 38 gpio-restart { 39 compatible = "gpio-restart"; 46 clock-frequency = <74250000>; 50 clock-frequency = <125000000>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/ |
| D | qcom-apq8060-dragonboard.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 4 #include <dt-bindings/leds/common.h> 5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 7 #include "qcom-msm8660.dtsi" 11 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 18 stdout-path = "serial0:115200n8"; 21 /* Main power of the board: 3.7V */ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer_mmio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marc Zyngier <marc.zyngier@arm.com> 11 - Mark Rutland <mark.rutland@arm.com> 14 ARM cores may have a memory mapped architected timer, which provides up to 8 22 - enum: 23 - arm,armv7-timer-mem 29 '#address-cells': 32 '#size-cells': [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer_mmio.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marc Zyngier <marc.zyngier@arm.com> 11 - Mark Rutland <mark.rutland@arm.com> 14 ARM cores may have a memory mapped architected timer, which provides up to 8 22 - enum: 23 - arm,armv7-timer-mem 29 '#address-cells': 32 '#size-cells': [all …]
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