Home
last modified time | relevance | path

Searched +full:pr +full:- +full:decoupler (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/fpga/
Dxlnx,pr-decoupler.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
13 The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more
19 is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function
21 bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a
25 Please refer to fpga-region.txt and fpga-bridge.txt in this directory for
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/fpga/
Dxilinx-pr-decoupler.txt1 Xilinx LogiCORE Partial Reconfig Decoupler Softcore
3 The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more
10 The Driver supports only MMIO handling. A PR region can have multiple
11 PR Decouplers which can be handled independently or chained via decouple/
15 - compatible : Should contain "xlnx,pr-decoupler-1.00" followed by
16 "xlnx,pr-decoupler"
17 - regs : base address and size for decoupler module
18 - clocks : input clock to IP
19 - clock-names : should contain "aclk"
21 See Documentation/devicetree/bindings/fpga/fpga-region.txt and
[all …]
/kernel/linux/linux-5.10/drivers/fpga/
Dxilinx-pr-decoupler.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Decoupler IP Core.
15 #include <linux/fpga/fpga-bridge.h>
29 writel(val, d->io_base + offset); in xlnx_pr_decoupler_write()
35 return readl(d->io_base + offset); in xlnx_pr_decouple_read()
41 struct xlnx_pr_decoupler_data *priv = bridge->priv; in xlnx_pr_decoupler_enable_set()
43 err = clk_enable(priv->clk); in xlnx_pr_decoupler_enable_set()
52 clk_disable(priv->clk); in xlnx_pr_decoupler_enable_set()
59 const struct xlnx_pr_decoupler_data *priv = bridge->priv; in xlnx_pr_decoupler_enable_show()
63 err = clk_enable(priv->clk); in xlnx_pr_decoupler_enable_show()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
52 FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
88 tristate "Technologic Systems TS-73xx SBC FPGA Manager"
92 present on the TS-73xx SBC boards.
117 tristate "Xilinx LogiCORE PR Decoupler"
121 Say Y to enable drivers for Xilinx LogiCORE PR Decoupler.
122 The PR Decoupler exists in the FPGA fabric to isolate one
154 Select this option to enable common support for Field-Programmable
199 Select this option to enable PCIe driver for PCIe-based
200 Field-Programmable Gate Array (FPGA) solutions which implement
DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-$(CONFIG_FPGA) += fpga-mgr.o
10 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
11 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
12 obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
13 obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
14 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
15 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
16 obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o
17 obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
[all …]
/kernel/linux/linux-6.6/drivers/fpga/
Dxilinx-pr-decoupler.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Decoupler IP Core.
15 #include <linux/fpga/fpga-bridge.h>
34 writel(val, d->io_base + offset); in xlnx_pr_decoupler_write()
40 return readl(d->io_base + offset); in xlnx_pr_decouple_read()
46 struct xlnx_pr_decoupler_data *priv = bridge->priv; in xlnx_pr_decoupler_enable_set()
48 err = clk_enable(priv->clk); in xlnx_pr_decoupler_enable_set()
57 clk_disable(priv->clk); in xlnx_pr_decoupler_enable_set()
64 const struct xlnx_pr_decoupler_data *priv = bridge->priv; in xlnx_pr_decoupler_enable_show()
68 err = clk_enable(priv->clk); in xlnx_pr_decoupler_enable_show()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
52 FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
88 tristate "Technologic Systems TS-73xx SBC FPGA Manager"
92 present on the TS-73xx SBC boards.
117 tristate "Xilinx LogiCORE PR Decoupler"
121 Say Y to enable drivers for Xilinx LogiCORE PR Decoupler
123 The PR Decoupler exists in the FPGA fabric to isolate one
128 safely handles AXI4MM and AXI4-Lite interfaces on a
161 Select this option to enable common support for Field-Programmable
210 the card. It also instantiates the SPI master (spi-altera) for
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-$(CONFIG_FPGA) += fpga-mgr.o
10 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
11 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
12 obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
13 obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
14 obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
15 obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
16 obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o
17 obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
[all …]