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/kernel/linux/linux-6.6/Documentation/gpu/amdgpu/display/
Ddisplay-manager.rst8 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
11 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
17 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
20 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
26 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
29 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
32 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
38 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
41 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
47 .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
[all …]
Ddcn-overview.rst10 .. kernel-figure:: dc_pipeline_overview.svg
19 * **Display Pipe and Plane (DPP)**: This block provides pre-blend pixel
23 * **Multiple Pipe/Plane Combined (MPC)**: This component performs blending of
24 multiple planes, using global or per-pixel alpha.
38 * **Multi-Media HUB (MMHUBBUB)**: Memory controller interface for DMCUB and DWB
43 the Display Micro-Controller Unit - version B (DMCUB), which is handled via
84 ----------------------
100 a one-to-one mapping of the link encoder to PHY, but we can configure the DCN
106 ---------
114 representation and convert them to a DCN specific floating-point format (i.e.,
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/
Dmpc.h1 /* Copyright 2012-15 Advanced Micro Devices, Inc.
26 * DOC: mpc-overview
29 * that performs blending of multiple planes, using global and per-pixel alpha.
30 * It also performs post-blending color correction operations according to the
62 * enum mpcc_alpha_blend_mode - define the alpha blend mode regarding pixel
85 * struct mpcc_blnd_cfg - MPCC blending configuration
89 * @pre_multiplied_alpha: whether pixel color values were pre-multiplied by the
98 bool pre_multiplied_alpha; /* alpha pre-multiplied mode flag */
118 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */
120 /* 0- disable frame alternate, 1- enable frame alternate */
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/kernel/linux/linux-6.6/drivers/gpu/drm/
Ddrm_blend.c6 * DRM core plane blending related functions
43 * sub-pixel accuracy, which is scaled up to a pixel-aligned destination
96 * plane-wide opacity, from transparent (0) to opaque (0xffff). It can be
99 * pre-multiplied by the global alpha associated to the plane.
109 * "rotate-<degrees>":
113 * "reflect-<axis>":
117 * reflect-x::
120 * | | -> | |
123 * reflect-y::
126 * | | -> | |
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Ddrm_connector.c51 * Hence they are reference-counted using drm_connector_get() and
67 * For connectors which are not fixed (like built-in panels) the driver needs to
76 * Note drm_connector_[un]register() first take connector->lock and then
94 { DRM_MODE_CONNECTOR_DVII, "DVI-I" },
95 { DRM_MODE_CONNECTOR_DVID, "DVI-D" },
96 { DRM_MODE_CONNECTOR_DVIA, "DVI-A" },
103 { DRM_MODE_CONNECTOR_HDMIA, "HDMI-A" },
104 { DRM_MODE_CONNECTOR_HDMIB, "HDMI-B" },
132 * drm_get_connector_type_name - return a string for connector type
147 * drm_connector_get_cmdline_mode - reads the user's cmdline mode
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/
Ddrm_blend.c6 * DRM core plane blending related functions
43 * sub-pixel accuracy, which is scaled up to a pixel-aligned destination
96 * plane-wide opacity, from transparent (0) to opaque (0xffff). It can be
99 * pre-multiplied by the global alpha associated to the plane.
109 * "rotate-<degrees>":
113 * "reflect-<axis>":
117 * reflect-x::
120 * | | -> | |
123 * reflect-y::
126 * | | -> | |
[all …]
Ddrm_connector.c44 * Hence they are reference-counted using drm_connector_get() and
60 * For connectors which are not fixed (like built-in panels) the driver needs to
69 * Note drm_connector_[un]register() first take connector->lock and then
87 { DRM_MODE_CONNECTOR_DVII, "DVI-I" },
88 { DRM_MODE_CONNECTOR_DVID, "DVI-D" },
89 { DRM_MODE_CONNECTOR_DVIA, "DVI-A" },
96 { DRM_MODE_CONNECTOR_HDMIA, "HDMI-A" },
97 { DRM_MODE_CONNECTOR_HDMIB, "HDMI-B" },
124 * drm_get_connector_type_name - return a string for connector type
139 * drm_connector_get_cmdline_mode - reads the user's cmdline mode
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dmpc.h1 /* Copyright 2012-15 Advanced Micro Devices, Inc.
62 * MPCC blending configuration
67 bool pre_multiplied_alpha; /* alpha pre-multiplied mode flag */
88 /* 0-single plane,2-row subsampling,4-column subsampling,6-checkboard subsampling */
90 /* 0- disable frame alternate, 1- enable frame alternate */
92 /* 0- disable field alternate, 1- enable field alternate */
94 /* 0-no force,2-force frame polarity from top,3-force frame polarity from bottom */
96 /* 0-no force,2-force field polarity from top,3-force field polarity from bottom */
117 * MPCC connection and blending configuration for a single MPCC instance.
124 struct mpcc_blnd_cfg blnd_cfg; /* The blending configuration for this MPCC */
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
19 D |-------| |----| | | | | HDMI PLL |
20 D | vd2 | VIU | | Video Post | | Video Encoders |<---|-----VCLK |
21 R |-------| |----| Processing | | | | |
22 | osd2 | | | |---| Enci ----------|----|-----VDAC------|
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/ipu3/include/uapi/
Dintel-ipu3.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
17 /* from include/uapi/linux/v4l2-controls.h */
26 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
34 * struct ipu3_uapi_grid_config - Grid plane config
56 * create a grid-based output, and the data is then divided into "slices".
71 * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB
108 * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer
119 * struct ipu3_uapi_awb_config_s - AWB config
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/kernel/linux/linux-5.10/drivers/staging/media/ipu3/include/
Dintel-ipu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
15 /* from include/uapi/linux/v4l2-controls.h */
24 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
32 * struct ipu3_uapi_grid_config - Grid plane config
48 * create a grid-based output, and the data is then divided into "slices".
79 * struct ipu3_uapi_awb_raw_buffer - AWB raw buffer
90 * struct ipu3_uapi_awb_config_s - AWB config
110 * struct ipu3_uapi_awb_config - AWB config wrapper
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_hwseq.c44 hws->ctx
47 hws->regs->reg
50 dc->ctx->logger
54 hws->shifts->field_name, hws->masks->field_name
59 struct dc_plane_state *plane_state = pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
60 bool sec_split = pipe_ctx->top_pipe && in patch_address_for_sbs_tb_stereo()
61 pipe_ctx->top_pipe->plane_state == pipe_ctx->plane_state; in patch_address_for_sbs_tb_stereo()
63 if (sec_split && plane_state->address.type == PLN_ADDR_TYPE_GRPH_STEREO && in patch_address_for_sbs_tb_stereo()
64 (pipe_ctx->stream->timing.timing_3d_format == in patch_address_for_sbs_tb_stereo()
66 pipe_ctx->stream->timing.timing_3d_format == in patch_address_for_sbs_tb_stereo()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/vkms/
Dvkms_composer.c1 // SPDX-License-Identifier: GPL-2.0+
16 int src_offset = composer->offset + (y * composer->pitch) in get_pixel_from_buffer()
17 + (x * composer->cpp); in get_pixel_from_buffer()
25 * compute_crc - Compute CRC value on output frame
38 int x_src = composer->src.x1 >> 16; in compute_crc()
39 int y_src = composer->src.y1 >> 16; in compute_crc()
40 int h_src = drm_rect_height(&composer->src) >> 16; in compute_crc()
41 int w_src = drm_rect_width(&composer->src) >> 16; in compute_crc()
58 pre_blend = (src * 255 + dst * (255 - alpha)); in blend_channel()
79 * blend - blend value at vaddr_src with value at vaddr_dst
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/
Dresource.h37 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
38 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
39 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
152 #define FREE_PIPE_INDEX_NOT_FOUND -1
200 * Inter-pipe Relation
204 * | 0 | -------------MPC---------ODM----------- |
206 * | 1 | ------------- | | | |
208 * | 2 | -------------MPC--------- | |
210 * | 3 | ------------- | | |
212 * | 4 | | ----------------------- |
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/kernel/linux/linux-5.10/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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/kernel/linux/linux-6.6/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/renesas/rcar-du/
Drcar_du_group.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Channels Pair
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 * The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending
12 * unit, timings generator, ...) and device-global resources (start/stop
19 * modeled as a single device with three CRTCs, two sets of "semi-global"
20 * resources, and a few device-global resources.
23 * counterpart in the DU documentation, that models those semi-global resources.
35 return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg); in rcar_du_group_read()
40 rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data); in rcar_du_group_write()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/rcar-du/
Drcar_du_group.c1 // SPDX-License-Identifier: GPL-2.0+
3 * rcar_du_group.c -- R-Car Display Unit Channels Pair
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 * The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending
12 * unit, timings generator, ...) and device-global resources (start/stop
19 * modeled as a single device with three CRTCs, two sets of "semi-global"
20 * resources, and a few device-global resources.
23 * counterpart in the DU documentation, that models those semi-global resources.
35 return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg); in rcar_du_group_read()
40 rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data); in rcar_du_group_write()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/vkms/
Dvkms_composer.c1 // SPDX-License-Identifier: GPL-2.0+
20 new_color = (src * 0xffff + dst * (0xffff - alpha)); in pre_mul_blend_channel()
26 * pre_mul_alpha_blend - alpha blending equation
36 * pre-multiplied with the alpha channel values. See more
44 int x_dst = frame_info->dst.x1; in pre_mul_alpha_blend()
45 struct pixel_argb_u16 *out = output_buffer->pixels + x_dst; in pre_mul_alpha_blend()
46 struct pixel_argb_u16 *in = stage_buffer->pixels; in pre_mul_alpha_blend()
47 int x_limit = min_t(size_t, drm_rect_width(&frame_info->dst), in pre_mul_alpha_blend()
48 stage_buffer->n_pixels); in pre_mul_alpha_blend()
60 if (frame_info->rotation & DRM_MODE_REFLECT_Y) in get_y_pos()
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/kernel/linux/linux-6.6/drivers/gpu/drm/sprd/
Dsprd_dpu.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/dma-buf.h>
130 struct dpu_context *ctx = &dpu->ctx; in dpu_wait_stop_done()
133 if (ctx->stopped) in dpu_wait_stop_done()
136 rc = wait_event_interruptible_timeout(ctx->wait_queue, ctx->evt_stop, in dpu_wait_stop_done()
138 ctx->evt_stop = false; in dpu_wait_stop_done()
140 ctx->stopped = true; in dpu_wait_stop_done()
143 drm_err(dpu->drm, "dpu wait for stop done time out!\n"); in dpu_wait_stop_done()
144 return -ETIMEDOUT; in dpu_wait_stop_done()
152 struct dpu_context *ctx = &dpu->ctx; in dpu_wait_update_done()
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/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author:Mark Yao <mark.yao@rock-chips.com>
45 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
47 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
49 vop_reg_set(vop, &win->phy->scl->ext->name, \
50 win->base, ~0, v, #name)
54 if (win_yuv2yuv && win_yuv2yuv->name.mask) \
55 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
60 if (win_yuv2yuv && win_yuv2yuv->phy->name.mask) \
61 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author:Mark Yao <mark.yao@rock-chips.com>
43 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
45 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
47 vop_reg_set(vop, &win->phy->scl->ext->name, \
48 win->base, ~0, v, #name)
52 if (win_yuv2yuv && win_yuv2yuv->name.mask) \
53 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
58 if (win_yuv2yuv && win_yuv2yuv->phy->name.mask) \
59 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/
Dnouveau_bo.c30 #include <linux/dma-mapping.h>
52 * NV10-NV40 tiling helpers
60 int i = reg - drm->tile.reg; in nv10_bo_update_tile_region()
61 struct nvkm_fb *fb = nvxx_fb(&drm->client.device); in nv10_bo_update_tile_region()
62 struct nvkm_fb_tile *tile = &fb->tile.region[i]; in nv10_bo_update_tile_region()
64 nouveau_fence_unref(&reg->fence); in nv10_bo_update_tile_region()
66 if (tile->pitch) in nv10_bo_update_tile_region()
79 struct nouveau_drm_tile *tile = &drm->tile.reg[i]; in nv10_bo_get_tile_region()
81 spin_lock(&drm->tile.lock); in nv10_bo_get_tile_region()
83 if (!tile->used && in nv10_bo_get_tile_region()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/device_include/
Dsvga3d_types.h1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 2012-2015 VMware, Inc.
28 * svga3d_types.h --
46 #define SVGA3D_INVALID_ID ((uint32)-1)
48 typedef uint8 SVGABool8; /* 8-bit Bool definition */
49 typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
176 SVGA3D_ARGB_S10E5 = 24, /* 16-bit floating-point ARGB */
177 SVGA3D_ARGB_S23E8 = 25, /* 32-bit floating-point ARGB */
192 /* Single- and dual-component floating point formats */
278 SVGA3D_ATI1 = 108, /* DX9-specific BC4_UNORM */
[all …]

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