| /kernel/linux/linux-5.10/drivers/gpu/ipu-v3/ |
| D | ipu-pre.c | 1 // SPDX-License-Identifier: GPL-2.0-only 13 #include <video/imx-ipu-v3.h> 15 #include "ipu-prv.h" 116 struct device_node *pre_node = of_parse_phandle(dev->of_node, in ipu_pre_lookup_by_phandle() 118 struct ipu_pre *pre; in ipu_pre_lookup_by_phandle() local 121 list_for_each_entry(pre, &ipu_pre_list, list) { in ipu_pre_lookup_by_phandle() 122 if (pre_node == pre->dev->of_node) { in ipu_pre_lookup_by_phandle() 124 device_link_add(dev, pre->dev, in ipu_pre_lookup_by_phandle() 127 return pre; in ipu_pre_lookup_by_phandle() 137 int ipu_pre_get(struct ipu_pre *pre) in ipu_pre_get() argument [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/ipu-v3/ |
| D | ipu-pre.c | 1 // SPDX-License-Identifier: GPL-2.0-only 13 #include <video/imx-ipu-v3.h> 15 #include "ipu-prv.h" 116 struct device_node *pre_node = of_parse_phandle(dev->of_node, in ipu_pre_lookup_by_phandle() 118 struct ipu_pre *pre; in ipu_pre_lookup_by_phandle() local 121 list_for_each_entry(pre, &ipu_pre_list, list) { in ipu_pre_lookup_by_phandle() 122 if (pre_node == pre->dev->of_node) { in ipu_pre_lookup_by_phandle() 124 device_link_add(dev, pre->dev, in ipu_pre_lookup_by_phandle() 127 return pre; in ipu_pre_lookup_by_phandle() 137 int ipu_pre_get(struct ipu_pre *pre) in ipu_pre_get() argument [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/watchdog/ |
| D | mediatek,mtk-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 13 The watchdog supports a pre-timeout interrupt that fires 14 timeout-sec/2 before the expiry. 17 - $ref: watchdog.yaml# 22 - enum: 23 - mediatek,mt2712-wdt [all …]
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| D | nuvoton,npcm-wdt.txt | 3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. 4 The watchdog supports a pre-timeout interrupt that fires 10ms before the 8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or 9 "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or 10 "nuvoton,npcm845-wdt" for NPCM845 (Arbel). 11 - reg : Offset and length of the register set for the device. 12 - interrupts : Contain the timer interrupt with flags for 16 - clocks : phandle of timer reference clock. 17 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx 21 - timeout-sec : Contains the watchdog timeout in seconds [all …]
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | dw_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2010-2011 Picochip Ltd., Jamie Iles 7 * in the many subsystems. The watchdog has 16 different timeout periods 52 /* There are sixteen TOPs (timeout periods) that can be set in the watchdog. */ 94 u32 timeout; member 105 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) & in dw_wdt_is_enabled() 113 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode() 118 writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode() 120 dw_wdt->rmod = rmod; in dw_wdt_update_mode() 124 unsigned int timeout, u32 *top_val) in dw_wdt_find_best_top() argument [all …]
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| D | davinci_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0 7 * Copyright (C) 2006-2013 Texas Instruments. 24 #define MODULE_NAME "DAVINCI-WDT: " 60 * @base - base io address of WD device 61 * @clk - source clock of WDT 62 * @wdd - hold watchdog device as is in WDT core 77 wdt_freq = clk_get_rate(davinci_wdt->clk); in davinci_wdt_start() 80 iowrite32(0, davinci_wdt->base + TCR); in davinci_wdt_start() 81 /* reset timer, set mode to 64-bit watchdog, and unreset */ in davinci_wdt_start() 82 iowrite32(0, davinci_wdt->base + TGCR); in davinci_wdt_start() [all …]
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| D | lpc18xx_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * ----- 9 * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit 35 /* Clock pre-scaler */ 38 /* Timeout values in seconds */ 70 spin_lock_irqsave(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed() 71 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed() 72 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed() 73 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed() 81 struct watchdog_device *wdt_dev = &lpc18xx_wdt->wdt_dev; in lpc18xx_wdt_timer_feed() [all …]
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| /kernel/linux/linux-6.6/drivers/watchdog/ |
| D | dw_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2010-2011 Picochip Ltd., Jamie Iles 7 * in the many subsystems. The watchdog has 16 different timeout periods 51 /* There are sixteen TOPs (timeout periods) that can be set in the watchdog. */ 93 u32 timeout; member 104 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) & in dw_wdt_is_enabled() 112 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode() 117 writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET); in dw_wdt_update_mode() 119 dw_wdt->rmod = rmod; in dw_wdt_update_mode() 123 unsigned int timeout, u32 *top_val) in dw_wdt_find_best_top() argument [all …]
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| D | davinci_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0 7 * Copyright (C) 2006-2013 Texas Instruments. 24 #define MODULE_NAME "DAVINCI-WDT: " 60 * @base - base io address of WD device 61 * @clk - source clock of WDT 62 * @wdd - hold watchdog device as is in WDT core 77 wdt_freq = clk_get_rate(davinci_wdt->clk); in davinci_wdt_start() 80 iowrite32(0, davinci_wdt->base + TCR); in davinci_wdt_start() 81 /* reset timer, set mode to 64-bit watchdog, and unreset */ in davinci_wdt_start() 82 iowrite32(0, davinci_wdt->base + TGCR); in davinci_wdt_start() [all …]
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| D | lpc18xx_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 * ----- 9 * The Watchdog consists of a fixed divide-by-4 clock pre-scaler and a 24-bit 35 /* Clock pre-scaler */ 38 /* Timeout values in seconds */ 70 spin_lock_irqsave(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed() 71 writel(LPC18XX_WDT_FEED_MAGIC1, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed() 72 writel(LPC18XX_WDT_FEED_MAGIC2, lpc18xx_wdt->base + LPC18XX_WDT_FEED); in lpc18xx_wdt_feed() 73 spin_unlock_irqrestore(&lpc18xx_wdt->lock, flags); in lpc18xx_wdt_feed() 81 struct watchdog_device *wdt_dev = &lpc18xx_wdt->wdt_dev; in lpc18xx_wdt_timer_feed() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | qcom,pm8916-wdt.txt | 3 This pm8916 watchdog timer controller must be under pm8916-pon node. 6 - compatible: should be "qcom,pm8916-wdt" 9 - interrupts : Watchdog pre-timeout (bark) interrupt. 10 - timeout-sec : Watchdog timeout value in seconds. 15 compatible = "qcom,pm8916", "qcom,spmi-pmic"; 19 compatible = "qcom,pm8916-pon"; 23 compatible = "qcom,pm8916-wdt"; 25 timeout-sec = <10>;
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| D | nuvoton,npcm-wdt.txt | 3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. 4 The watchdog supports a pre-timeout interrupt that fires 10ms before the 8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg). 9 - reg : Offset and length of the register set for the device. 10 - interrupts : Contain the timer interrupt with flags for 14 - clocks : phandle of timer reference clock. 15 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx 19 - timeout-sec : Contains the watchdog timeout in seconds 24 compatible = "nuvoton,npcm750-wdt";
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/selftests/ |
| D | intel_scheduler_helpers.c | 1 // SPDX-License-Identifier: MIT 35 saved->reset = engine->i915->params.reset; in intel_selftest_modify_policy() 36 saved->flags = engine->flags; in intel_selftest_modify_policy() 37 saved->timeslice = engine->props.timeslice_duration_ms; in intel_selftest_modify_policy() 38 saved->preempt_timeout = engine->props.preempt_timeout_ms; in intel_selftest_modify_policy() 43 * Enable force pre-emption on time slice expiration in intel_selftest_modify_policy() 44 * together with engine reset on pre-emption timeout. in intel_selftest_modify_policy() 47 * Also, reduce the preemption timeout to something in intel_selftest_modify_policy() 50 engine->i915->params.reset = 2; in intel_selftest_modify_policy() 51 engine->flags |= I915_ENGINE_WANT_FORCED_PREEMPTION; in intel_selftest_modify_policy() [all …]
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| /kernel/linux/linux-6.6/drivers/clk/samsung/ |
| D | clk-cpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 22 * registers to acheive a fast co-oridinated rate change for all the CPU domain 36 #include <linux/clk-provider.h> 37 #include "clk-cpu.h" 71 unsigned long timeout = jiffies + msecs_to_jiffies(10); in wait_until_divider_stable() local 76 } while (time_before(jiffies, timeout)); in wait_until_divider_stable() 81 pr_err("%s: timeout in divider stablization\n", __func__); in wait_until_divider_stable() 91 unsigned long timeout = jiffies + msecs_to_jiffies(10); in wait_until_mux_stable() local 96 } while (time_before(jiffies, timeout)); in wait_until_mux_stable() 101 pr_err("%s: re-parenting mux timed-out\n", __func__); in wait_until_mux_stable() [all …]
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| /kernel/linux/linux-5.10/drivers/clk/samsung/ |
| D | clk-cpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 22 * registers to acheive a fast co-oridinated rate change for all the CPU domain 36 #include <linux/clk-provider.h> 37 #include "clk-cpu.h" 71 unsigned long timeout = jiffies + msecs_to_jiffies(10); in wait_until_divider_stable() local 76 } while (time_before(jiffies, timeout)); in wait_until_divider_stable() 81 pr_err("%s: timeout in divider stablization\n", __func__); in wait_until_divider_stable() 91 unsigned long timeout = jiffies + msecs_to_jiffies(10); in wait_until_mux_stable() local 96 } while (time_before(jiffies, timeout)); in wait_until_mux_stable() 101 pr_err("%s: re-parenting mux timed-out\n", __func__); in wait_until_mux_stable() [all …]
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| /kernel/linux/linux-6.6/drivers/media/dvb-frontends/ |
| D | drxk_hard.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 24 #define SCU_RESULT_SIZE -4 25 #define SCU_RESULT_INVPAR -3 26 #define SCU_RESULT_UNKSTD -2 27 #define SCU_RESULT_UNKCMD -1 189 u16 top; /* rf-agc take over point */ 190 u16 cut_off_current; /* rf-agc is accelerated if output current 191 is below cut-off current */ 197 u16 reference; /* pre SAW reference value, range 0 .. 31 */ 198 bool use_pre_saw; /* TRUE algorithms must use pre SAW sense */ [all …]
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | drxk_hard.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 24 #define SCU_RESULT_SIZE -4 25 #define SCU_RESULT_INVPAR -3 26 #define SCU_RESULT_UNKSTD -2 27 #define SCU_RESULT_UNKCMD -1 189 u16 top; /* rf-agc take over point */ 190 u16 cut_off_current; /* rf-agc is accelerated if output current 191 is below cut-off current */ 197 u16 reference; /* pre SAW reference value, range 0 .. 31 */ 198 bool use_pre_saw; /* TRUE algorithms must use pre SAW sense */ [all …]
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| /kernel/linux/linux-5.10/drivers/input/touchscreen/ |
| D | imx6ul_tsc.c | 1 // SPDX-License-Identifier: GPL-2.0 109 unsigned long timeout; in imx6ul_adc_init() local 111 reinit_completion(&tsc->completion); in imx6ul_adc_init() 113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init() 118 if (tsc->average_enable) { in imx6ul_adc_init() 120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; in imx6ul_adc_init() 123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init() 128 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); in imx6ul_adc_init() 131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC); in imx6ul_adc_init() 133 if (tsc->average_enable) in imx6ul_adc_init() [all …]
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| /kernel/linux/linux-6.6/drivers/input/touchscreen/ |
| D | imx6ul_tsc.c | 1 // SPDX-License-Identifier: GPL-2.0 109 unsigned long timeout; in imx6ul_adc_init() local 111 reinit_completion(&tsc->completion); in imx6ul_adc_init() 113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init() 118 if (tsc->average_enable) { in imx6ul_adc_init() 120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; in imx6ul_adc_init() 123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); in imx6ul_adc_init() 128 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); in imx6ul_adc_init() 131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC); in imx6ul_adc_init() 133 if (tsc->average_enable) in imx6ul_adc_init() [all …]
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| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| D | qcom-spmi-vadc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. 21 #include <dt-bindings/iio/qcom,spmi-vadc.h> 23 #include "qcom-vadc-common.h" 76 * struct vadc_channel_prop - VADC channel property. 99 * struct vadc_priv - VADC private structure. 139 return regmap_bulk_read(vadc->regmap, vadc->base + offset, data, 1); in vadc_read() 144 return regmap_write(vadc->regmap, vadc->base + offset, data); in vadc_write() 203 dev_err(vadc->dev, in vadc_show_status() 222 ret = vadc_write(vadc, VADC_ADC_CH_SEL_CTL, prop->channel); in vadc_configure() [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath5k/ |
| D | pci.c | 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 33 { PCI_VDEVICE(ATHEROS, 0x0011) }, /* 5311 - this is on AHB bus !*/ 45 { PCI_VDEVICE(ATHEROS, 0x001a) }, /* 2413 Griffin-lite */ 47 { PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */ 59 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv; in ath5k_pci_read_cachesize() 62 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); in ath5k_pci_read_cachesize() 81 struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; in ath5k_pci_eeprom_read() 82 u32 status, timeout; in ath5k_pci_eeprom_read() local 87 if (ah->ah_version == AR5K_AR5210) { in ath5k_pci_eeprom_read() 96 for (timeout = AR5K_TUNE_REGISTER_TIMEOUT; timeout > 0; timeout--) { in ath5k_pci_eeprom_read() [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ath5k/ |
| D | pci.c | 2 * Copyright (c) 2008-2009 Atheros Communications Inc. 33 { PCI_VDEVICE(ATHEROS, 0x0011) }, /* 5311 - this is on AHB bus !*/ 45 { PCI_VDEVICE(ATHEROS, 0x001a) }, /* 2413 Griffin-lite */ 47 { PCI_VDEVICE(ATHEROS, 0x001c) }, /* PCI-E cards */ 57 struct ath5k_hw *ah = (struct ath5k_hw *) common->priv; in ath5k_pci_read_cachesize() 60 pci_read_config_byte(ah->pdev, PCI_CACHE_LINE_SIZE, &u8tmp); in ath5k_pci_read_cachesize() 79 struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; in ath5k_pci_eeprom_read() 80 u32 status, timeout; in ath5k_pci_eeprom_read() local 85 if (ah->ah_version == AR5K_AR5210) { in ath5k_pci_eeprom_read() 94 for (timeout = AR5K_TUNE_REGISTER_TIMEOUT; timeout > 0; timeout--) { in ath5k_pci_eeprom_read() [all …]
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| /kernel/linux/linux-5.10/drivers/i2c/busses/ |
| D | i2c-ali1563.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * i2c-ali1563.c - i2c driver for the ALi 1563 Southbridge 68 int timeout; in ali1563_transaction() local 69 int status = -EIO; in ali1563_transaction() 71 dev_dbg(&a->dev, "Transaction (pre): STS=%02x, CNTL1=%02x, " in ali1563_transaction() 79 dev_err(&a->dev, "ali1563: Trying to reset busy device\n"); in ali1563_transaction() 83 return -EBUSY; in ali1563_transaction() 87 timeout = ALI1563_MAX_TIMEOUT; in ali1563_transaction() 90 } while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout); in ali1563_transaction() 92 dev_dbg(&a->dev, "Transaction (post): STS=%02x, CNTL1=%02x, " in ali1563_transaction() [all …]
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| /kernel/linux/linux-6.6/drivers/i2c/busses/ |
| D | i2c-ali1563.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * i2c-ali1563.c - i2c driver for the ALi 1563 Southbridge 68 int timeout; in ali1563_transaction() local 69 int status = -EIO; in ali1563_transaction() 71 dev_dbg(&a->dev, "Transaction (pre): STS=%02x, CNTL1=%02x, " in ali1563_transaction() 79 dev_err(&a->dev, "ali1563: Trying to reset busy device\n"); in ali1563_transaction() 83 return -EBUSY; in ali1563_transaction() 87 timeout = ALI1563_MAX_TIMEOUT; in ali1563_transaction() 90 } while (((data = inb_p(SMB_HST_STS)) & HST_STS_BUSY) && --timeout); in ali1563_transaction() 92 dev_dbg(&a->dev, "Transaction (post): STS=%02x, CNTL1=%02x, " in ali1563_transaction() [all …]
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| /kernel/linux/linux-6.6/drivers/accel/ivpu/ |
| D | ivpu_pm.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2020-2023 Intel Corporation 29 struct ivpu_fw_info *fw = vdev->fw; in ivpu_pm_prepare_cold_boot() 34 fw->entry_point = fw->cold_boot_entry_point; in ivpu_pm_prepare_cold_boot() 39 struct ivpu_fw_info *fw = vdev->fw; in ivpu_pm_prepare_warm_boot() 40 struct vpu_boot_params *bp = fw->mem->kvaddr; in ivpu_pm_prepare_warm_boot() 42 if (!bp->save_restore_ret_address) { in ivpu_pm_prepare_warm_boot() 47 ivpu_dbg(vdev, FW_BOOT, "Save/restore entry point %llx", bp->save_restore_ret_address); in ivpu_pm_prepare_warm_boot() 48 fw->entry_point = bp->save_restore_ret_address; in ivpu_pm_prepare_warm_boot() 101 struct ivpu_device *vdev = pm->vdev; in ivpu_pm_recovery_work() [all …]
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