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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Wesley Cheng <quic_wcheng@quicinc.com>
19 - items:
20 - enum:
21 - qcom,ipq6018-qusb2-phy
22 - qcom,ipq8074-qusb2-phy
23 - qcom,ipq9574-qusb2-phy
[all …]
/kernel/linux/linux-5.10/include/dt-bindings/phy/
Dphy-qcom-qusb2.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* PHY PREEMPHASIS bit values */
33 /* PHY PREEMPHASIS-WIDTH bit values */
/kernel/linux/linux-6.6/include/dt-bindings/phy/
Dphy-qcom-qusb2.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* PHY PREEMPHASIS bit values */
33 /* PHY PREEMPHASIS-WIDTH bit values */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
[all …]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
23 #include <dt-bindings/phy/phy-qcom-qusb2.h>
105 * if yes, then offset gives index in the reg-layout
123 /* set of registers with offsets different per-PHY */
287 "vdda-pll", "vdda-phy-dpdm",
292 /* struct override_param - structure holding qusb2 v2 phy overriding param
301 /*struct override_params - structure holding qusb2 v2 phy overriding params
304 * @preemphasis: Amplitude Pre-Emphasis to be updated in TUNE1 register
305 * @preemphasis_width: half/full-width Pre-Emphasis updated via TUNE1
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845-xiaomi-beryllium.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &tz_mem;
17 /delete-node/ &adsp_mem;
18 /delete-node/ &wlan_msa_mem;
19 /delete-node/ &mpss_region;
20 /delete-node/ &venus_mem;
[all …]
Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18 compatible = "qcom,sc7180-idp", "qcom,sc7180";
28 stdout-path = "serial0:115200n8";
40 /delete-node/ &hyp_mem;
41 /delete-node/ &xbl_mem;
42 /delete-node/ &aop_mem;
43 /delete-node/ &sec_apps_mem;
[all …]
Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
19 compatible = "lenovo,yoga-c630", "qcom,sdm845";
27 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
32 pm8998-rpmh-regulators {
33 compatible = "qcom,pm8998-rpmh-regulators";
[all …]
Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
23 stdout-path = "serial0:115200n8";
26 vph_pwr: vph-pwr-regulator {
27 compatible = "regulator-fixed";
28 regulator-name = "vph_pwr";
29 regulator-min-microvolt = <3700000>;
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
26 stdout-path = "serial0:115200n8";
30 compatible = "pwm-backlight";
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
[all …]
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
22 #include <dt-bindings/phy/phy-qcom-qusb2.h>
105 * if yes, then offset gives index in the reg-layout
123 /* set of registers with offsets different per-PHY */
294 /* true if PHY default clk scheme is single-ended */
373 "vdd", "vdda-pll", "vdda-phy-dpdm",
378 /* struct override_param - structure holding qusb2 v2 phy overriding param
387 /*struct override_params - structure holding qusb2 v2 phy overriding params
390 * @preemphasis: Amplitude Pre-Emphasis to be updated in TUNE1 register
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm845-samsung-starqltechn.dts1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 Samsung S9 (SM-G9600) (starqltechn / star2qltechn) common device tree source
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 chassis-type = "handset";
16 model = "Samsung Galaxy S9 SM-G9600";
20 #address-cells = <2>;
21 #size-cells = <2>;
24 compatible = "simple-framebuffer";
[all …]
Dsdm845-xiaomi-beryllium-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8 #include <dt-bindings/sound/qcom,q6afe.h>
9 #include <dt-bindings/sound/qcom,q6asm.h>
11 #include "sdm845-wcd9340.dtsi"
19 /delete-node/ &tz_mem;
20 /delete-node/ &adsp_mem;
[all …]
Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include "sc7180-firmware-tfa.dtsi"
20 compatible = "qcom,sc7180-idp", "qcom,sc7180";
30 stdout-path = "serial0:115200n8";
42 /delete-node/ &hyp_mem;
43 /delete-node/ &xbl_mem;
[all …]
Dsdm850-samsung-w737.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include <dt-bindings/sound/qcom,q6asm.h>
17 #include "sdm845-wcd9340.dtsi"
24 /delete-node/ &qseecom_mem;
[all …]
Dsdm845-lg-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &adsp_mem;
17 /delete-node/ &cdsp_mem;
18 /delete-node/ &gpu_mem;
19 /delete-node/ &ipa_fw_mem;
20 /delete-node/ &mba_region;
21 /delete-node/ &mpss_region;
[all …]
Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
[all …]
Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
25 /delete-node/ &rmtfs_mem;
[all …]
Dsdm850-lenovo-yoga-c630.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem;
[all …]
Dsc7180-acer-aspire1.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 /delete-node/ &tz_mem;
14 /delete-node/ &ipa_fw_mem;
19 chassis-type = "laptop";
29 stdout-path = "serial0:115200n8";
32 reserved-memory {
33 zap_mem: zap-shader@80840000 {
[all …]
Dsdm845-oneplus-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/sound/qcom,q6afe.h>
13 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
20 /delete-node/ &rmtfs_mem;
29 stdout-path = "serial0:115200n8";
32 gpio-hall-sensor {
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Dsor.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
52 u8 preemphasis[4]; member
71 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
86 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
101 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
116 .preemphasis = { 0x00, 0x17, 0x17, 0x17 },
131 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
150 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
165 .preemphasis = { 0x01, 0x02, 0x02, 0x02 },
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Dsor.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
52 u8 preemphasis[4]; member
71 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
86 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
101 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
116 .preemphasis = { 0x00, 0x17, 0x17, 0x17 },
131 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
150 .preemphasis = { 0x00, 0x00, 0x00, 0x00 },
165 .preemphasis = { 0x01, 0x02, 0x02, 0x02 },
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/xlnx/
Dzynqmp_dp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
241 * struct zynqmp_dp_link_config - Common link config between source and sink
251 * struct zynqmp_dp_mode - Configured mode of DisplayPort
265 * struct zynqmp_dp_config - Configuration of DisplayPort from DTS
277 * struct zynqmp_dp - Xilinx DisplayPort core
328 writel(val, dp->iomem + offset); in zynqmp_dp_write()
333 return readl(dp->iomem + offset); in zynqmp_dp_read()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/xlnx/
Dzynqmp_dp.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
242 * struct zynqmp_dp_link_config - Common link config between source and sink
252 * struct zynqmp_dp_mode - Configured mode of DisplayPort
266 * struct zynqmp_dp_config - Configuration of DisplayPort from DTS
278 * struct zynqmp_dp - Xilinx DisplayPort core
335 writel(val, dp->iomem + offset); in zynqmp_dp_write()
340 return readl(dp->iomem + offset); in zynqmp_dp_read()
[all …]

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