| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/ |
| D | ibm,powerpc-cpu-features.txt | 13 enablement, privilege, and compatibility metadata.
94 - usable-privilege
104 This property describes the privilege levels and/or software components
118 This property describes the HV privilege support required to enable the
119 feature to lesser privilege levels. If the property does not exist then no
137 This property describes the OS privilege support required to enable the
138 feature to lesser privilege levels. If the property does not exist then no
179 This property may exist when the usable-privilege property value has PR bit set.
213 usable-privilege = <1 | 2 | 4>;
219 usable-privilege = <1 | 2>;
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/ |
| D | ibm,powerpc-cpu-features.txt | 13 enablement, privilege, and compatibility metadata.
94 - usable-privilege
104 This property describes the privilege levels and/or software components
118 This property describes the HV privilege support required to enable the
119 feature to lesser privilege levels. If the property does not exist then no
137 This property describes the OS privilege support required to enable the
138 feature to lesser privilege levels. If the property does not exist then no
179 This property may exist when the usable-privilege property value has PR bit set.
213 usable-privilege = <1 | 2 | 4>;
219 usable-privilege = <1 | 2>;
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/ |
| D | microwatt.dts | 44 usable-privilege = <2>;
49 usable-privilege = <3>;
55 usable-privilege = <2>;
60 usable-privilege = <3>;
65 usable-privilege = <2>;
71 usable-privilege = <3>;
|
| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | hw_breakpoint.h | 17 privilege : 2, member
27 /* Privilege Levels */
35 u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) | in encode_ctrl_reg()
38 if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1) in encode_ctrl_reg()
49 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
|
| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| D | hw_breakpoint.h | 17 privilege : 2, member
27 /* Privilege Levels */
35 u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) | in encode_ctrl_reg()
38 if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1) in encode_ctrl_reg()
49 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
|
| /kernel/linux/linux-6.6/Documentation/arch/ia64/ |
| D | fsys.rst | 34 - execution is at privilege level 0 (most-privileged)
51 privilege level is at level 0, this means that fsys-mode requires some
58 Linux operates in fsys-mode when (a) the privilege level is 0 (most
70 to by "regs" was executing in user mode (privilege level 3).
177 is exited. This is accomplished with the help of the lower-privilege
181 "br.ret" instruction that lowers the privilege level, a trap will
216 breakpoint that triggers at any privilege level other than
222 syscall_via_break(), with privilege level 3. Note: the
228 taken _after_ restoring the privilege level, the CPU has already
241 syscall_via_break(), with privilege level 3.
|
| /kernel/linux/linux-5.10/Documentation/ia64/ |
| D | fsys.rst | 34 - execution is at privilege level 0 (most-privileged)
51 privilege level is at level 0, this means that fsys-mode requires some
58 Linux operates in fsys-mode when (a) the privilege level is 0 (most
70 to by "regs" was executing in user mode (privilege level 3).
177 is exited. This is accomplished with the help of the lower-privilege
181 "br.ret" instruction that lowers the privilege level, a trap will
216 breakpoint that triggers at any privilege level other than
222 syscall_via_break(), with privilege level 3. Note: the
228 taken _after_ restoring the privilege level, the CPU has already
241 syscall_via_break(), with privilege level 3.
|
| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | hw_breakpoint.h | 17 privilege : 2,
31 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg()
39 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
68 /* Privilege Levels */
|
| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | hw_breakpoint.h | 17 privilege : 2,
31 (ctrl.privilege << 1) | ctrl.enabled; in encode_ctrl_reg()
39 ctrl->privilege = reg & 0x3; in decode_ctrl_reg()
68 /* Privilege Levels */
|
| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | hw_breakpoint.c | 137 * Convert a breakpoint privilege level to the corresponding exception
140 static enum dbg_active_el debug_exception_level(int privilege) in debug_exception_level() argument
142 switch (privilege) { in debug_exception_level()
148 pr_warn("invalid breakpoint privilege level %d\n", privilege); in debug_exception_level()
229 enum dbg_active_el dbg_el = debug_exception_level(info->ctrl.privilege); in hw_breakpoint_control()
489 * Privilege in arch_build_bp_info()
494 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL1; in arch_build_bp_info()
496 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL0; in arch_build_bp_info()
569 if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) in hw_breakpoint_arch_parse()
582 int i, max_slots, privilege; in toggle_bp_registers() local
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/kernel/ |
| D | hw_breakpoint.c | 137 * Convert a breakpoint privilege level to the corresponding exception
140 static enum dbg_active_el debug_exception_level(int privilege) in debug_exception_level() argument
142 switch (privilege) { in debug_exception_level()
148 pr_warn("invalid breakpoint privilege level %d\n", privilege); in debug_exception_level()
229 enum dbg_active_el dbg_el = debug_exception_level(info->ctrl.privilege); in hw_breakpoint_control()
489 * Privilege in arch_build_bp_info()
494 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL1; in arch_build_bp_info()
496 hw->ctrl.privilege = AARCH64_BREAKPOINT_EL0; in arch_build_bp_info()
569 if (hw->ctrl.privilege == AARCH64_BREAKPOINT_EL1 && bp->hw.target) in hw_breakpoint_arch_parse()
582 int i, max_slots, privilege; in toggle_bp_registers() local
[all …]
|
| /kernel/linux/linux-5.10/arch/sparc/include/uapi/asm/ |
| D | psr.h | 7 * PSTATE.PRIV for the current CPU privilege level.
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
|
| D | psrcompat.h | 10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
|
| /kernel/linux/linux-6.6/arch/sparc/include/uapi/asm/ |
| D | psr.h | 7 * PSTATE.PRIV for the current CPU privilege level.
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
|
| D | psrcompat.h | 10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
|
| /kernel/linux/linux-6.6/arch/x86/include/asm/ |
| D | segment.h | 31 * privilege level
36 * When running on Xen PV, the actual privilege level of the kernel is 1,
37 * not 0. Testing the Requested Privilege Level in a segment selector to
39 * SEGMENT_RPL_MASK is wrong because the PV kernel's privilege level
43 * kernels because privilege level 2 is never used.
47 /* User mode is privilege level 3: */
|
| /kernel/linux/linux-5.10/arch/x86/include/asm/ |
| D | segment.h | 30 * privilege level
35 * When running on Xen PV, the actual privilege level of the kernel is 1,
36 * not 0. Testing the Requested Privilege Level in a segment selector to
38 * SEGMENT_RPL_MASK is wrong because the PV kernel's privilege level
42 * kernels because privilege level 2 is never used.
46 /* User mode is privilege level 3: */
|
| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/dscr/ |
| D | dscr_explicit_test.c | 7 * privilege state SPR and the problem state SPR for this purpose.
9 * When using the privilege state SPR, the instructions such as
|
| /kernel/linux/linux-6.6/Documentation/userspace-api/ |
| D | no_new_privs.rst | 26 promises not to grant the privilege to do anything that could not have
41 Note that ``no_new_privs`` does not prevent privilege changes that do not
|
| /kernel/linux/linux-5.10/Documentation/userspace-api/ |
| D | no_new_privs.rst | 26 promises not to grant the privilege to do anything that could not have
41 Note that ``no_new_privs`` does not prevent privilege changes that do not
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | sifive,plic-1.0.0.yaml | 16 A hart context is a privilege mode in a hardware execution thread. For example,
18 privilege modes per hart; machine mode and supervisor mode.
|
| /kernel/linux/linux-6.6/arch/loongarch/kernel/ |
| D | hw_breakpoint.c | 189 u32 ctrl, privilege; in hw_breakpoint_control() local
196 privilege = CTRL_PLV0_ENABLE; in hw_breakpoint_control()
198 privilege = CTRL_PLV3_ENABLE; in hw_breakpoint_control()
226 write_wb_reg(CSR_CFG_CTRL, i, 0, privilege); in hw_breakpoint_control()
232 write_wb_reg(CSR_CFG_CTRL, i, 1, ctrl | privilege); in hw_breakpoint_control()
|
| /kernel/linux/linux-6.6/tools/perf/arch/x86/util/ |
| D | evsel.c | 118 return scnprintf(msg, size, "AMD IBS doesn't support privilege filtering. Try " in arch_evsel__open_strerror()
119 "again without the privilege modifiers (like 'k') at the end."); in arch_evsel__open_strerror()
|
| /kernel/linux/linux-6.6/tools/perf/Documentation/ |
| D | perf-arm-spe.txt | 140 … - collect physical address (as well as VA) of loads/stores (PMSCR.PA) - requires privilege
141 …1 - collect physical timestamp instead of virtual timestamp (PMSCR.PCT) - requires privilege
206 Root privilege is required to collect context packets. But these only increase the accuracy of
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/hw-vuln/ |
| D | srso.rst | 10 tricking the elevated privilege domain (the kernel) into leaking
70 but employs an IBPB barrier on privilege
|