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/third_party/rust/rust/src/tools/rustfmt/tests/source/cfg_if/detect/os/linux/
Dcpuinfo.rs102 const CORE_DUO_T6500: &str = r"processor : 0
154 r"Processor : AArch64 Processor rev 3 (aarch64)
155 processor : 0
156 processor : 1
157 processor : 2
158 processor : 3
159 processor : 4
160 processor : 5
161 processor : 6
162 processor : 7
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/third_party/rust/rust/src/tools/rustfmt/tests/target/cfg_if/detect/os/linux/
Dcpuinfo.rs102 const CORE_DUO_T6500: &str = r"processor : 0
153 const ARM_CORTEX_A53: &str = r"Processor : AArch64 Processor rev 3 (aarch64)
154 processor : 0
155 processor : 1
156 processor : 2
157 processor : 3
158 processor : 4
159 processor : 5
160 processor : 6
161 processor : 7
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/third_party/elfio/c_wrapper/
Delf_types_c_wrapper.hpp130 #define EM_TRICORE 44 // Siemens Tricore embedded processor
136 #define EM_IA_64 50 // Intel IA-64 Processor
142 #define EM_NCPU 56 // Sony nCPU embedded RISC processor
144 #define EM_STARCORE 58 // Motorola Star*Core processor
145 #define EM_ME16 59 // Toyota ME16 processor
146 #define EM_ST100 60 // STMicroelectronics ST100 processor
147 #define EM_TINYJ 61 // Advanced Logic Corp. TinyJ embedded processor
148 #define EM_X86_64 62 // Advanced Micro Devices X86-64 processor
149 #define EM_PDSP 63 // Sony DSP Processor
162 #define EM_CRIS 76 // Axis Communications 32-bit embedded processor
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Subtarget.h71 /// X86 processor family: Intel Atom, and others
85 /// True if the processor supports X87 instructions.
88 /// True if the processor supports CMPXCHG8B.
91 /// True if this processor has NOPL instruction
95 /// True if this processor has conditional move instructions
99 /// True if the processor supports X86-64 instructions.
102 /// True if the processor supports POPCNT.
105 /// True if the processor supports SSE4A instructions.
149 /// True if the processor has the MOVBE instruction.
152 /// True if the processor has the RDRAND instruction.
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/third_party/skia/m133/third_party/externals/libyuv/unit_test/testdata/
Djuno.txt1 Processor : AArch64 Processor rev 0 (aarch64)
2 processor : 0
3 processor : 1
4 processor : 2
5 processor : 3
6 processor : 4
7 processor : 5
Dtegra3.txt1 Processor : ARMv7 Processor rev 9 (v7l)
2 processor : 0
5 processor : 1
8 processor : 2
11 processor : 3
/third_party/icu/tools/cldr/cldr-to-icu/src/main/java/org/unicode/icu/tool/cldrtoicu/
DCldrDataProcessor.java27 * An immutable processor which can be configured to process CLDR data according to a series of
30 * <p>In typical use a processor would be statically created to bind paths and handler functions
34 * <p>A processor is built by adding a mixture of "actions" to a builder. An action either defines
36 * to start a new sub-processor at a specific point in the data hierarchy (see {@link
39 * @param <T> the main "state" type used by the processor for the top-level processing.
42 /** Returns a processor builder which operates on a "state" of type {@code <T>}. */
50 * @param <T> the "state" type used by the processor.
68 * processor
90 * processor
113 * processor
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/HardwareUnits/
DResourceManager.h10 /// The classes here represent processor resource units and their management
28 /// Used to notify the internal state of a processor resource.
30 /// A processor resource is available if it is not reserved, and there are
31 /// available slots in the buffer. A processor resource is unavailable if it
32 /// is either reserved, or the associated buffer is full. A processor resource
56 /// Selects a processor resource unit from a ReadyMask.
59 /// Called by the ResourceManager when a processor resource group, or a
60 /// processor resource with multiple units has become unavailable.
66 /// Default resource allocation strategy used by processor resource groups and
67 /// processor resources with multiple units.
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600Processors.td1 //===-- R600Processors.td - R600 Processor definitions --------------------===//
70 def : Processor<"r600", R600_VLIW5_Itin,
74 def : Processor<"r630", R600_VLIW5_Itin,
78 def : Processor<"rs880", R600_VLIW5_Itin,
82 def : Processor<"rv670", R600_VLIW5_Itin,
90 def : Processor<"rv710", R600_VLIW5_Itin,
94 def : Processor<"rv730", R600_VLIW5_Itin,
98 def : Processor<"rv770", R600_VLIW5_Itin,
106 def : Processor<"cedar", R600_VLIW5_Itin,
111 def : Processor<"cypress", R600_VLIW5_Itin,
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/third_party/skia/src/gpu/
DGrFragmentProcessor.h29 * Some fragment-processor creation methods have preconditions that might not be satisfied by the
31 * succeeds, the new fragment processor is created and `success` is true. If a precondition is not
80 * Returns a fragment processor that generates the passed-in color, modulated by the child's
88 * Returns a parent fragment processor that adopts the passed fragment processor as a child.
96 * Returns a parent fragment processor that adopts the passed fragment processor as a child.
104 * Returns a fragment processor which samples the passed-in fragment processor using
112 * Returns a fragment processor that calls the passed in fragment processor, and then swizzles
119 * Returns a fragment processor that calls the passed in fragment processor, and then clamps
125 * Returns a fragment processor that composes two fragment processors `f` and `g` into f(g(x)).
133 * Returns a fragment processor that calls the passed in fragment processor, then runs the
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DGrProcessorSet.h63 /** Comparisons are only legal on finalized processor sets. */
68 * This is used to report results of processor analysis when a processor set is finalized (see
130 * state of the processor set may change to an equivalent but more optimal set of processors.
135 * This must be called before the processor set is used to construct a GrPipeline and may only
139 * that owns a processor set is recorded to ensure pending and writes are propagated to
170 XP(const GrXferProcessor* processor) : fProcessor(processor) {} in XP() argument
/third_party/skia/m133/src/gpu/ganesh/
DGrFragmentProcessor.h44 * Some fragment-processor creation methods have preconditions that might not be satisfied by the
46 * succeeds, the new fragment processor is created and `success` is true. If a precondition is not
95 * Returns a fragment processor that generates the passed-in color, modulated by the child's
103 * Returns a parent fragment processor that adopts the passed fragment processor as a child.
111 * Returns a parent fragment processor that adopts the passed fragment processor as a child.
119 * Returns a fragment processor which returns `args.fDestColor`. This is only meaningful in
125 * Returns a fragment processor that calls the passed in fragment processor, and then swizzles
132 * Returns a fragment processor that calls the passed in fragment processor, and then clamps
138 * Returns a fragment processor that composes two fragment processors `f` and `g` into f(g(x)).
146 * Returns a fragment processor that calls the passed in fragment processor, then runs the
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DGrProcessorSet.h73 /** Comparisons are only legal on finalized processor sets. */
78 * This is used to report results of processor analysis when a processor set is finalized (see
140 * state of the processor set may change to an equivalent but more optimal set of processors.
145 * This must be called before the processor set is used to construct a GrPipeline and may only
149 * that owns a processor set is recorded to ensure pending and writes are propagated to
180 XP(const GrXferProcessor* processor) : fProcessor(processor) {} in XP() argument
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/
DELF.h10 // This header contains common, non-processor-specific data structures and
71 Elf32_Word e_flags; // Processor-specific flags
116 ET_LOPROC = 0xff00, // Beginning of processor-specific codes
117 ET_HIPROC = 0xffff // Processor-specific
160 EM_IA_64 = 50, // Intel IA-64 processor architecture
166 EM_NCPU = 56, // Sony nCPU embedded RISC processor
168 EM_STARCORE = 58, // Motorola Star*Core processor
169 EM_ME16 = 59, // Toyota ME16 processor
170 EM_ST100 = 60, // STMicroelectronics ST100 processor
171 EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family
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/third_party/elfio/elfio/
Delf_types.hpp109 constexpr Elf_Half EM_TRICORE = 44; // Siemens Tricore embedded processor
115 constexpr Elf_Half EM_IA_64 = 50; // Intel IA-64 Processor
121 constexpr Elf_Half EM_NCPU = 56; // Sony nCPU embedded RISC processor
123 constexpr Elf_Half EM_STARCORE = 58; // Motorola Star*Core processor
124 constexpr Elf_Half EM_ME16 = 59; // Toyota ME16 processor
125 constexpr Elf_Half EM_ST100 = 60; // STMicroelectronics ST100 processor
126 constexpr Elf_Half EM_TINYJ = 61; // Advanced Logic Corp. TinyJ embedded processor
127 constexpr Elf_Half EM_X86_64 = 62; // Advanced Micro Devices X86-64 processor
128 constexpr Elf_Half EM_PDSP = 63; // Sony DSP Processor
141 constexpr Elf_Half EM_CRIS = 76 ; // Axis Communications 32-bit embedded processor
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Delfio_dump.hpp151 { EM_TRICORE, "Siemens Tricore embedded processor" },
157 { EM_IA_64, "Intel IA-64 Processor" },
163 { EM_NCPU, "Sony nCPU embedded RISC processor" },
165 { EM_STARCORE, "Motorola Star*Core processor" },
166 { EM_ME16, "Toyota ME16 processor" },
167 { EM_ST100, "STMicroelectronics ST100 processor" },
168 { EM_TINYJ, "Advanced Logic Corp. TinyJ embedded processor" },
169 { EM_X86_64, "Advanced Micro Devices X86-64 processor" },
170 { EM_PDSP, "Sony DSP Processor" },
183 { EM_CRIS, "Axis Communications 32-bit embedded processor" },
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/third_party/skia/m133/third_party/externals/libyuv/util/
Dcpuid.c35 // AuthenticAMD AMD processor in main()
36 // CentaurHauls Centaur processor in main()
37 // CyrixInstead Cyrix processor in main()
38 // GenuineIntel Intel processor in main()
39 // GenuineTMx86 Transmeta processor in main()
40 // Geode by NSC National Semiconductor processor in main()
41 // NexGenDriven NexGen processor in main()
42 // RiseRiseRise Rise Technology processor in main()
43 // SiS SiS SiS SiS processor in main()
44 // UMC UMC UMC UMC processor in main()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/BinaryFormat/
DELF.h9 // This header contains common, non-processor-specific data structures and
68 Elf32_Word e_flags; // Processor-specific flags
117 ET_LOPROC = 0xff00, // Beginning of processor-specific codes
118 ET_HIPROC = 0xffff // Processor-specific
161 EM_IA_64 = 50, // Intel IA-64 processor architecture
167 EM_NCPU = 56, // Sony nCPU embedded RISC processor
169 EM_STARCORE = 58, // Motorola Star*Core processor
170 EM_ME16 = 59, // Toyota ME16 processor
171 EM_ST100 = 60, // STMicroelectronics ST100 processor
172 EM_TINYJ = 61, // Advanced Logic Corp. TinyJ embedded processor family
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/third_party/backends/doc/descriptions/
Dhp.desc31 :scsi "HP" "C1750A" "processor"
36 :scsi "HP" "C1790A" "processor"
41 :scsi "HP" "C2500A" "processor"
54 :scsi "HP" "C2520A" "processor"
59 :scsi "HP" "C1130A" "processor"
71 :scsi "HP" "C5110A" "processor"
91 :scsi "HP" "C6270A" "processor"
104 :scsi "HP" "C7670A" "processor"
/third_party/mindspore/mindspore-src/source/mindspore/ccsrc/backend/common/graph_kernel/split_model/
Dsplit_model_factory.h32 SplitModelPtr CreateSplitModel(const std::string &processor);
34 void Register(const std::string &processor, const RegFunc &func) { creators[processor] = func; } in Register() argument
42 …SplitModelRegister(const std::string &processor, const SplitModelFactory::RegFunc &func) : func_(f… in SplitModelRegister() argument
43 SplitModelFactory::Instance().Register(processor, func); in SplitModelRegister()
54 #define SPLIT_MODEL_REGISTER(processor, cls, ...) … argument
56processor, [__VA_ARGS__]() noexcept { …
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparc.td88 : Processor<Name, NoItineraries, Features>;
129 def : Processor<"leon2", LEON2Itineraries,
133 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
134 def : Processor<"at697e", LEON2Itineraries,
138 // TO DO: Place-holder: Processor specific features will be added *very* soon here.
139 def : Processor<"at697f", LEON2Itineraries,
144 def : Processor<"leon3", LEON3Itineraries,
147 // LEON 3 FT (UT699). Provides features for the UT699 processor
149 def : Processor<"ut699", LEON3Itineraries,
152 // LEON3 FT (GR712RC). Provides features for the GR712RC processor.
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/third_party/elfutils/libdwelf/
Ddwelf_elf_e_machine_string.c124 return "Motorola Star*Core processor"; in dwelf_elf_e_machine_string()
126 return "Toyota ME16 processor"; in dwelf_elf_e_machine_string()
134 return "Sony DSP Processor"; in dwelf_elf_e_machine_string()
160 return "Axis Communications 32-bit embedded processor"; in dwelf_elf_e_machine_string()
162 return "Infineon Technologies 32-bit embedded processor"; in dwelf_elf_e_machine_string()
164 return "Element 14 64-bit DSP Processor"; in dwelf_elf_e_machine_string()
166 return "LSI Logic 16-bit DSP Processor"; in dwelf_elf_e_machine_string()
168 return "Donald Knuth's educational 64-bit processor"; in dwelf_elf_e_machine_string()
200 return "Thompson Multimedia General Purpose Processor"; in dwelf_elf_e_machine_string()
212 return "MAX processor"; in dwelf_elf_e_machine_string()
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/third_party/mindspore/mindspore-src/source/mindspore/ccsrc/kernel/
Dframework_utils.cc244 KernelPackPtr SearchCache(const std::string &kernel_name, const std::string &processor) { in SearchCache() argument
256 if (!kernel_pack->ReadFromJsonFile(kernel_json, processor)) { in SearchCache()
268 KernelPackPtr InsertCache(const std::string &kernel_name, const std::string &processor) { in InsertCache() argument
269 MS_LOG(INFO) << "Insert cache for kernel:" << kernel_name << ", processr:" << processor; in InsertCache()
278 if (!kernel_pack->ReadFromJsonFile(kernel_json, processor)) { in InsertCache()
460 …dInfo(const std::shared_ptr<KernelBuildInfo::KernelBuildInfoBuilder> &builder, Processor processor, in SetKernelBuildInfo() argument
464 builder->SetProcessor(processor); in SetKernelBuildInfo()
491 …const CNodePtr &kernel_node, const std::shared_ptr<const OpInfo> &op_info_ptr, Processor processor, in ParseMetadata() argument
521 SetKernelBuildInfo(builder, processor, op_info_ptr); in ParseMetadata()
545 SetKernelBuildInfo(builder, processor, op_info_ptr); in ParseMetadata()
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/third_party/rust/rust/tests/ui/associated-types/
Dissue-20825.stderr1 error[E0391]: cycle detected when computing the super traits of `Processor` with associated type na…
4 LL | pub trait Processor: Subscriber<Input = Self::Input> {
7 …= note: ...which immediately requires computing the super traits of `Processor` with associated ty…
8 note: cycle used when computing the super predicates of `Processor`
11 LL | pub trait Processor: Subscriber<Input = Self::Input> {
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSchedule.td27 // processor resources and latency with each SchedReadWrite type.
107 // A processor may only implement part of published ISA, due to either new ISA
111 // For a processor which doesn't support some feature(s), the schedule model
129 // Define a kind of processor resource that may be common across
133 // Define a number of interchangeable processor resources. NumUnits
182 // SchedModel ties these units to a processor for any stand-alone defs
197 // Subtargets typically define processor resource kind and number of
251 // SchedModel ties these resources to a processor.
259 // Allow a processor to mark some scheduling classes as unsupported
262 // Allow a processor to mark some scheduling classes as single-issue.
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