Home
last modified time | relevance | path

Searched +full:protected +full:- +full:clocks (Results 1 – 25 of 125) sorted by relevance

12345

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dclock-bindings.txt1 This binding is a work-in-progress, and are based on some experimental
10 value of a #clock-cells property in the clock provider node.
17 #clock-cells: Number of cells in a clock specifier; Typically 0 for nodes
22 clock-output-names: Recommended to be a list of strings of clock output signal
24 However, the meaning of clock-output-names is domain
33 the provider's clock-output-names property.
38 #clock-cells = <1>;
39 clock-output-names = "ckil", "ckih";
42 - this node defines a device with two clock outputs, the first named
44 clocks by index. The names should reflect the clock output signal
[all …]
Dqcom,gcc-sc7180.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7180.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-sc7180.h
22 const: qcom,gcc-sc7180
24 clocks:
[all …]
Dqcom,gcc-sm8250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-sm8250.h
22 const: qcom,gcc-sm8250
24 clocks:
[all …]
Dqcom,gcc-sm8150.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-sm8150.h
22 const: qcom,gcc-sm8150
24 clocks:
[all …]
Dqcom,gcc-msm8998.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-msm8998.h
22 const: qcom,gcc-msm8998
24 clocks:
[all …]
Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeffrey Hugo <jhugo@codeaurora.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm multimedia clock control module which supports the clocks, resets and
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8660
23 - qcom,mmcc-msm8960
[all …]
Dqcom,gcc-msm8996.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-msm8996.h
22 const: qcom,gcc-msm8996
24 clocks:
[all …]
Dqcom,gcc-qcs404.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-qcs404.h
22 const: qcom,gcc-qcs404
24 '#clock-cells':
[all …]
Dqcom,gcc-ipq8074.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-ipq8074.h
22 const: qcom,gcc-ipq8074
24 '#clock-cells':
[all …]
Dqcom,gcc-apq8064.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-msm8960.h
19 - dt-bindings/reset/qcom,gcc-msm8960.h
23 const: qcom,gcc-apq8064
[all …]
Dqcom,gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm global clock control module which supports the clocks, resets and
18 - dt-bindings/clock/qcom,gcc-apq8084.h
19 - dt-bindings/reset/qcom,gcc-apq8084.h
20 - dt-bindings/clock/qcom,gcc-ipq4019.h
21 - dt-bindings/clock/qcom,gcc-ipq6018.h
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dqcom,gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
15 clocks, resets and power domains.
18 '#clock-cells':
21 '#reset-cells':
24 '#power-domain-cells':
30 protected-clocks:
[all …]
Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Qualcomm multimedia clock control module provides the clocks, resets and
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
[all …]
Dqcom,sa8775p-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
13 Qualcomm global clock control module provides the clocks, resets and
16 See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h
20 const: qcom,sa8775p-gcc
22 clocks:
24 - description: XO reference clock
[all …]
Dqcom,gcc-sc8280xp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 Qualcomm global clock control module provides the clocks, resets and
16 See also:: include/dt-bindings/clock/qcom,gcc-sc8280xp.h
20 const: qcom,gcc-sc8280xp
22 clocks:
24 - description: XO reference clock
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
10 #include <linux/clk-provider.h>
11 #include <linux/reset-controller.h>
15 #include "clk-rcg.h"
16 #include "clk-regmap.h"
32 if (!f->freq) in qcom_find_freq()
35 for (; f->freq; f++) in qcom_find_freq()
36 if (rate <= f->freq) in qcom_find_freq()
40 return f - 1; in qcom_find_freq()
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
10 #include <linux/clk-provider.h>
11 #include <linux/reset-controller.h>
15 #include "clk-rcg.h"
16 #include "clk-regmap.h"
32 if (!f->freq) in qcom_find_freq()
35 for (; f->freq; f++) in qcom_find_freq()
36 if (rate <= f->freq) in qcom_find_freq()
40 return f - 1; in qcom_find_freq()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
24 clocks:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Drenesas,sysc-rmobile.txt1 DT bindings for the Renesas R-Mobile System Controller
5 The R-Mobile System Controller provides the following functions:
6 - Boot mode management,
7 - Reset generation,
8 - Power management.
11 - compatible: Should be "renesas,sysc-<soctype>", "renesas,sysc-rmobile" as
14 - "renesas,sysc-r8a73a4" (R-Mobile APE6)
15 - "renesas,sysc-r8a7740" (R-Mobile A1)
16 - "renesas,sysc-sh73a0" (SH-Mobile AG5)
17 - reg: Two address start and address range blocks for the device:
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8953-xiaomi-daisy.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 /dts-v1/;
11 /delete-node/ &adsp_fw_mem;
12 /delete-node/ &qseecom_mem;
13 /delete-node/ &wcnss_fw_mem;
18 chassis-type = "handset";
19 qcom,msm-id = <293 0>;
20 qcom,board-id = <0x1000b 0x9>;
23 #address-cells = <2>;
24 #size-cells = <2>;
[all …]
Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/gpio/gpio.h>
13 interrupt-parent = <&intc>;
15 qcom,msm-id = <292 0x0>;
[all …]
/kernel/linux/linux-6.6/sound/pci/echoaudio/
Dechoaudio.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
[all …]
/kernel/linux/linux-5.10/sound/pci/echoaudio/
Dechoaudio.h3 Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22 MA 02111-1307, USA.
26 Translation from C++ and adaptation for use in ALSA-Driver
34 +-----------+
35 record | |<-------------------- Inputs
36 <-------| | |
39 ------->| | +-------+
40 play | |--->|monitor|-------> Outputs
41 +-----------+ | mixer |
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/
Dclk.rst22 clk which unifies the framework-level accounting and infrastructure that
28 The second half of the interface is comprised of the hardware-specific
30 hardware-specific structures needed to model a particular clock. For
32 clk_ops, such as .enable or .set_rate, implies the hardware-specific
35 hardware-specific bits for the hypothetical "foo" hardware.
62 api itself defines several driver-facing functions which operate on
66 clk_ops pointer in struct clk_core to perform the hardware-specific parts of
67 the operations defined in clk-provider.h::
107 which abstract the details of struct clk from the hardware-specific bits, and
109 drivers/clk/clk-gate.c::
[all …]
/kernel/linux/linux-6.6/drivers/tty/serial/
Dmvebu-uart.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Marvell Armada-3700 Serial Driver
11 #include <linux/clk-provider.h>
106 #define MVEBU_UART_TYPE "mvebu-uart"
165 return (struct mvebu_uart *)port->private_data; in to_mvuart()
168 #define IS_EXTENDED(port) (to_mvuart(port)->data->is_ext)
170 #define UART_RBR(port) (to_mvuart(port)->data->regs.rbr)
171 #define UART_TSH(port) (to_mvuart(port)->data->regs.tsh)
172 #define UART_CTRL(port) (to_mvuart(port)->data->regs.ctrl)
173 #define UART_INTR(port) (to_mvuart(port)->data->regs.intr)
[all …]

12345