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/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dclock.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
36 #include <rdma/mlx5-abi.h>
75 timer_h = ioread32be(&dev->iseg->internal_timer_h); in mlx5_read_internal_timer()
77 timer_l = ioread32be(&dev->iseg->internal_timer_l); in mlx5_read_internal_timer()
79 timer_h1 = ioread32be(&dev->iseg->internal_timer_h); in mlx5_read_internal_timer()
83 timer_l = ioread32be(&dev->iseg->internal_timer_l); in mlx5_read_internal_timer()
92 struct mlx5_timer *timer = container_of(cc, struct mlx5_timer, cycles); in read_internal_timer() local
93 struct mlx5_clock *clock = container_of(timer, struct mlx5_clock, timer); in read_internal_timer()
97 return mlx5_read_internal_timer(mdev, NULL) & cc->mask; in read_internal_timer()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dintel,ixp46x-ptp-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Intel IXP46x PTP Timer (TSYNC)
11 - Linus Walleij <linus.walleij@linaro.org>
14 The Intel IXP46x PTP timer is known in the manual as IEEE1588 Hardware
15 Assist and Time Synchronization Hardware Assist TSYNC provides a PTP
16 timer. It exists in the Intel IXP45x and IXP46x XScale SoCs.
20 const: intel,ixp46x-ptp-timer
[all …]
Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Madalin Bucur <madalin.bucur@nxp.com>
15 10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
22 - fsl,fman-dtsec
23 - fsl,fman-xgec
24 - fsl,fman-memac
26 cell-index:
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/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlx5/core/lib/
Dclock.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
37 #include <rdma/mlx5-abi.h>
72 MLX5_MTUTC_OPERATION_ADJUST_TIME_EXTENDED_MIN = -200000,
107 * dev_freq_khz = 2^(shift_constant - 16) in mlx5_ptp_shift_constant()
118 static s32 mlx5_ptp_getmaxphase(struct ptp_clock_info *ptp) in mlx5_ptp_getmaxphase() argument
120 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); in mlx5_ptp_getmaxphase()
132 s64 max = mlx5_ptp_getmaxphase(&mdev->clock.ptp_info); in mlx5_is_mtutc_time_adj_cap()
134 if (delta < -max || delta > max) in mlx5_is_mtutc_time_adj_cap()
145 return -EOPNOTSUPP; in mlx5_set_mtutc()
[all …]
/kernel/linux/linux-5.10/include/linux/fsl/
Dptp_qoriq.h1 // SPDX-License-Identifier: GPL-2.0
14 * qoriq ptp registers
17 u32 tmr_ctrl; /* Timer control register */
19 u32 tmr_temask; /* Timer event mask register */
21 u32 tmr_pemask; /* Timer event mask register */
23 u32 tmr_cnt_h; /* Timer counter high register */
24 u32 tmr_cnt_l; /* Timer counter low register */
25 u32 tmr_add; /* Timer drift compensation addend register */
26 u32 tmr_acc; /* Timer accumulator register */
27 u32 tmr_prsc; /* Timer prescale */
[all …]
/kernel/linux/linux-6.6/include/linux/fsl/
Dptp_qoriq.h1 // SPDX-License-Identifier: GPL-2.0
14 * qoriq ptp registers
17 u32 tmr_ctrl; /* Timer control register */
19 u32 tmr_temask; /* Timer event mask register */
21 u32 tmr_pemask; /* Timer event mask register */
23 u32 tmr_cnt_h; /* Timer counter high register */
24 u32 tmr_cnt_l; /* Timer counter low register */
25 u32 tmr_add; /* Timer drift compensation addend register */
26 u32 tmr_acc; /* Timer accumulator register */
27 u32 tmr_prsc; /* Timer prescale */
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ptp/
Dptp-qoriq.txt1 * Freescale QorIQ 1588 timer based PTP clock
5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 Should be "fsl,dpaa2-ptp" for DPAA2
8 Should be "fsl,enetc-ptp" for ENETC
9 - reg Offset and length of the register set for the device
10 - interrupts There should be at least two interrupts. Some devices
11 have as many as four PTP related interrupts.
15 - fsl,cksel Timer reference clock source.
16 - fsl,tclk-period Timer reference clock period in nanoseconds.
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ptp/
Dptp-qoriq.txt1 * Freescale QorIQ 1588 timer based PTP clock
5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 Should be "fsl,dpaa2-ptp" for DPAA2
8 Should be "fsl,enetc-ptp" for ENETC
9 - reg Offset and length of the register set for the device
10 - interrupts There should be at least two interrupts. Some devices
11 have as many as four PTP related interrupts.
15 - fsl,cksel Timer reference clock source.
16 - fsl,tclk-period Timer reference clock period in nanoseconds.
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/freescale/
Dfec_ptp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Fast Ethernet Controller (ENET) PTP driver for MX6x.
93 * fec_ptp_read - read raw cycle counter (to be used by time counter)
106 tempval = readl(fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
108 writel(tempval, fep->hwp + FEC_ATIME_CTRL); in fec_ptp_read()
110 if (fep->quirks & FEC_QUIRK_BUG_CAPTURE) in fec_ptp_read()
113 return readl(fep->hwp + FEC_ATIME); in fec_ptp_read()
121 * This function enble the PPS ouput on the timer channel.
130 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
132 if (fep->pps_enable == enable) { in fec_ptp_enable_pps()
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/kernel/linux/linux-5.10/drivers/net/ethernet/freescale/
Dfec_ptp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Fast Ethernet Controller (ENET) PTP driver for MX6x.
96 * This function enble the PPS ouput on the timer channel.
106 if (fep->pps_enable == enable) in fec_ptp_enable_pps()
109 fep->pps_channel = DEFAULT_PPS_CHANNEL; in fec_ptp_enable_pps()
110 fep->reload_period = PPS_OUPUT_RELOAD_PERIOD; in fec_ptp_enable_pps()
112 spin_lock_irqsave(&fep->tmreg_lock, flags); in fec_ptp_enable_pps()
117 writel(FEC_T_TF_MASK, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
123 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
126 writel(val, fep->hwp + FEC_TCSR(fep->pps_channel)); in fec_ptp_enable_pps()
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/kernel/linux/linux-6.6/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_ptp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 PTP Header file
18 /* IEEE 1588 PTP register offsets */
20 #define PTP_SSIR 0x04 /* Sub-Second Increment Reg */
27 #define PTP_ATNR 0x48 /* Auxiliary Timestamp - Nanoseconds Reg */
28 #define PTP_ATSR 0x4c /* Auxiliary Timestamp - Seconds Reg */
37 #define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */
40 /* PTP Timestamp control register defines */
49 /* Enable PTP packet Processing for Version 2 Format */
51 /* Enable Processing of PTP over Ethernet Frames */
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/kernel/linux/linux-5.10/drivers/ptp/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PTP clock support configuration
6 menu "PTP clock support"
9 tristate "PTP clock support"
16 standard defines a Precision Time Protocol (PTP), which can
22 This driver adds support for PTP clocks as character
23 devices. If you want to use a PTP clock, then you should
27 will be called ptp.
30 tristate "Broadcom DTE as PTP clock"
37 (DTE) in the Broadcom SoC's as a PTP clock.
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/kernel/linux/linux-6.6/drivers/ptp/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PTP clock support configuration
6 menu "PTP clock support"
9 tristate "PTP clock support"
17 standard defines a Precision Time Protocol (PTP), which can
23 This driver adds support for PTP clocks as character
24 devices. If you want to use a PTP clock, then you should
28 will be called ptp.
37 into vmlinux while the PTP support itself is in a loadable
39 If PTP support is disabled, this dependency will still be
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx4/
Den_clock.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
39 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
45 struct mlx4_dev *dev = mdev->dev; in mlx4_en_read_clock()
47 return mlx4_read_clock(dev) & tc->mask; in mlx4_en_read_clock()
55 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo); in mlx4_en_get_cqe_ts()
56 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16; in mlx4_en_get_cqe_ts()
69 seq = read_seqbegin(&mdev->clock_lock); in mlx4_en_fill_hwtstamps()
70 nsec = timecounter_cyc2time(&mdev->clock, timestamp); in mlx4_en_fill_hwtstamps()
71 } while (read_seqretry(&mdev->clock_lock, seq)); in mlx4_en_fill_hwtstamps()
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/kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlx4/
Den_clock.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
39 /* mlx4_en_read_clock - read raw cycle counter (to be used by time counter)
45 struct mlx4_dev *dev = mdev->dev; in mlx4_en_read_clock()
47 return mlx4_read_clock(dev) & tc->mask; in mlx4_en_read_clock()
55 lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo); in mlx4_en_get_cqe_ts()
56 hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16; in mlx4_en_get_cqe_ts()
67 seq = read_seqbegin(&mdev->clock_lock); in mlx4_en_get_hwtstamp()
68 nsec = timecounter_cyc2time(&mdev->clock, timestamp); in mlx4_en_get_hwtstamp()
69 } while (read_seqretry(&mdev->clock_lock, seq)); in mlx4_en_get_hwtstamp()
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/kernel/linux/linux-6.6/drivers/net/ethernet/xscale/
Dptp_ixp46x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock using the IXP46X
46 lo = __raw_readl(&regs->systime_lo); in ixp_systime_read()
47 hi = __raw_readl(&regs->systime_hi); in ixp_systime_read()
64 __raw_writel(lo, &regs->systime_lo); in ixp_systime_write()
65 __raw_writel(hi, &regs->systime_hi); in ixp_systime_write()
75 struct ixp46x_ts_regs *regs = ixp_clock->regs; in isr()
79 val = __raw_readl(&regs->event); in isr()
83 if (ixp_clock->exts0_enabled) { in isr()
84 hi = __raw_readl(&regs->asms_hi); in isr()
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/kernel/linux/linux-6.6/drivers/net/ethernet/cadence/
Dmacb_ptp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * 1588 PTP support for Cadence GEM device.
5 * Copyright (C) 2017 Cadence Design Systems - https://www.cadence.com
26 #define GEM_PTP_TIMER_NAME "gem-ptp-timer"
31 if (bp->hw_dma_cap == HW_DMA_CAP_PTP) in macb_ptp_desc()
34 if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP) in macb_ptp_desc()
41 static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts, in gem_tsu_get_time() argument
44 struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); in gem_tsu_get_time()
49 spin_lock_irqsave(&bp->tsu_clk_lock, flags); in gem_tsu_get_time()
59 /* if so, use later read & re-read seconds in gem_tsu_get_time()
[all …]
Dmacb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
99 #define GEM_RXPTPUNI 0x00D4 /* PTP RX Unicast address */
100 #define GEM_TXPTPUNI 0x00D8 /* PTP TX Unicast address */
101 #define GEM_EFTSH 0x00e8 /* PTP Event Frame Transmitted Seconds Register 47:32 */
102 #define GEM_EFRSH 0x00ec /* PTP Event Frame Received Seconds Register 47:32 */
103 #define GEM_PEFTSH 0x00f0 /* PTP Peer Event Frame Transmitted Seconds Register 47:32 */
104 #define GEM_PEFRSH 0x00f4 /* PTP Peer Event Frame Received Seconds Register 47:32 */
113 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
114 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
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/kernel/linux/linux-5.10/drivers/net/ethernet/cadence/
Dmacb_ptp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * 1588 PTP support for Cadence GEM device.
5 * Copyright (C) 2017 Cadence Design Systems - https://www.cadence.com
26 #define GEM_PTP_TIMER_NAME "gem-ptp-timer"
31 if (bp->hw_dma_cap == HW_DMA_CAP_PTP) in macb_ptp_desc()
34 if (bp->hw_dma_cap == HW_DMA_CAP_64B_PTP) in macb_ptp_desc()
41 static int gem_tsu_get_time(struct ptp_clock_info *ptp, struct timespec64 *ts) in gem_tsu_get_time() argument
43 struct macb *bp = container_of(ptp, struct macb, ptp_clock_info); in gem_tsu_get_time()
48 spin_lock_irqsave(&bp->tsu_clk_lock, flags); in gem_tsu_get_time()
56 /* if so, use later read & re-read seconds in gem_tsu_get_time()
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/kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_ptp.c2 * cxgb4_ptp.c:Chelsio PTP support for T5/T6
4 * Copyright (c) 2003-2017 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
54 * cxgb4_ptp_is_ptp_tx - determine whether TX packet is PTP or not
55 * @skb: skb of outgoing ptp request
63 return skb->len >= PTP_MIN_LENGTH && in cxgb4_ptp_is_ptp_tx()
64 skb->len <= PTP_IN_TRANSMIT_PACKET_MAXNUM && in cxgb4_ptp_is_ptp_tx()
65 likely(skb->protocol == htons(ETH_P_IP)) && in cxgb4_ptp_is_ptp_tx()
66 ip_hdr(skb)->protocol == IPPROTO_UDP && in cxgb4_ptp_is_ptp_tx()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb4/
Dcxgb4_ptp.c2 * cxgb4_ptp.c:Chelsio PTP support for T5/T6
4 * Copyright (c) 2003-2017 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
54 * cxgb4_ptp_is_ptp_tx - determine whether TX packet is PTP or not
55 * @skb: skb of outgoing ptp request
63 return skb->len >= PTP_MIN_LENGTH && in cxgb4_ptp_is_ptp_tx()
64 skb->len <= PTP_IN_TRANSMIT_PACKET_MAXNUM && in cxgb4_ptp_is_ptp_tx()
65 likely(skb->protocol == htons(ETH_P_IP)) && in cxgb4_ptp_is_ptp_tx()
66 ip_hdr(skb)->protocol == IPPROTO_UDP && in cxgb4_ptp_is_ptp_tx()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/e1000e/
Dptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 /* PTP 1588 Hardware Clock (PHC)
5 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
18 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
19 * @ptp: ptp clock structure
25 static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) in e1000e_phc_adjfreq() argument
27 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, in e1000e_phc_adjfreq()
29 struct e1000_hw *hw = &adapter->hw; in e1000e_phc_adjfreq()
36 if ((delta > ptp->max_adj) || (delta <= -1000000000)) in e1000e_phc_adjfreq()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/e1000e/
Dptp.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 /* PTP 1588 Hardware Clock (PHC)
5 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
18 * e1000e_phc_adjfine - adjust the frequency of the hardware clock
19 * @ptp: ptp clock structure
27 static int e1000e_phc_adjfine(struct ptp_clock_info *ptp, long delta) in e1000e_phc_adjfine() argument
29 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter, in e1000e_phc_adjfine()
31 struct e1000_hw *hw = &adapter->hw; in e1000e_phc_adjfine()
42 spin_lock_irqsave(&adapter->systim_lock, flags); in e1000e_phc_adjfine()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/xscale/
Dptp_ixp46x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock using the IXP46X
47 lo = __raw_readl(&regs->systime_lo); in ixp_systime_read()
48 hi = __raw_readl(&regs->systime_hi); in ixp_systime_read()
65 __raw_writel(lo, &regs->systime_lo); in ixp_systime_write()
66 __raw_writel(hi, &regs->systime_hi); in ixp_systime_write()
76 struct ixp46x_ts_regs *regs = ixp_clock->regs; in isr()
80 val = __raw_readl(&regs->event); in isr()
84 if (ixp_clock->exts0_enabled) { in isr()
85 hi = __raw_readl(&regs->asms_hi); in isr()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/freescale/enetc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
14 If compiled as module (M), the module name is fsl-enetc.
26 If compiled as module (M), the module name is fsl-enetc-vf.
35 If compiled as module (M), the module name is fsl-enetc-mdio.
38 tristate "ENETC PTP clock driver"
42 This driver adds support for using the ENETC 1588 timer
43 as a PTP clock. This clock is only useful if your PTP
44 programs are getting hardware time stamps on the PTP Ethernet
47 If compiled as module (M), the module name is fsl-enetc-ptp.
50 bool "ENETC hardware Time-sensitive Network support"
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