| /kernel/linux/linux-6.6/drivers/pwm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menuconfig PWM config 3 bool "Pulse-Width Modulation (PWM) Support" 5 Generic Pulse-Width Modulation (PWM) support. 7 In Pulse-Width Modulation, a variation of the width of pulses 14 This framework provides a generic interface to PWM devices 16 to register and unregister a PWM chip, an abstraction of a PWM 17 controller, that supports one or more PWM devices. Client 18 drivers can request PWM devices and use the generic framework 21 This generic framework replaces the legacy PWM framework which [all …]
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| D | pwm-lpss-platform.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Intel Low Power Subsystem PWM controller driver 7 * Derived from the original pwm-lpss.c 17 #include "pwm-lpss.h" 26 info = device_get_match_data(&pdev->dev); in pwm_lpss_probe_platform() 28 return -ENODEV; in pwm_lpss_probe_platform() 34 lpwm = devm_pwm_lpss_probe(&pdev->dev, base, info); in pwm_lpss_probe_platform() 41 * On Cherry Trail devices the GFX0._PS0 AML checks if the controller in pwm_lpss_probe_platform() 43 * believes is the correct state to the PWM controller. in pwm_lpss_probe_platform() 44 * Because of this we must disallow direct-complete, which keeps the in pwm_lpss_probe_platform() [all …]
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| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menuconfig PWM config 3 bool "Pulse-Width Modulation (PWM) Support" 5 Generic Pulse-Width Modulation (PWM) support. 7 In Pulse-Width Modulation, a variation of the width of pulses 14 This framework provides a generic interface to PWM devices 16 to register and unregister a PWM chip, an abstraction of a PWM 17 controller, that supports one or more PWM devices. Client 18 drivers can request PWM devices and use the generic framework 21 This generic framework replaces the legacy PWM framework which [all …]
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| D | pwm-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * drivers/pwm/pwm-tegra.c 5 * Tegra pulse-width-modulation controller driver 7 * Copyright (c) 2010-2020, NVIDIA Corporation. 8 * Based on arch/arm/plat-mxc/pwm.c by Sascha Hauer <s.hauer@pengutronix.de> 11 * 1. 13-bit: Frequency division (SCALE) 12 * 2. 8-bit : Pulse division (DUTY) 13 * 3. 1-bit : Enable bit 15 * The PWM clock frequency is divided by 256 before subdividing it based 17 * frequency for PWM output. The maximum output frequency that can be [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/hwmon/ |
| D | npcm750-pwm-fan.txt | 1 Nuvoton NPCM7xx PWM and Fan Tacho controller device 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) 4 controller outputs and 16 Fan tachometer controller inputs. 6 Required properties for pwm-fan node 7 - #address-cells : should be 1. 8 - #size-cells : should be 0. 9 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. 10 - reg : specifies physical base address and size of the registers. 11 - reg-names : must contain: 12 * "pwm" for the PWM registers. [all …]
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| D | aspeed-pwm-tacho.txt | 1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver 3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho 4 controller can support upto 16 Fan tachometer inputs. 6 There can be upto 8 fans supported. Each fan can have one PWM output and 9 Required properties for pwm-tacho node: 10 - #address-cells : should be 1. 12 - #size-cells : should be 1. 14 - #cooling-cells: should be 2. 16 - reg : address and length of the register set for the device. 18 - pinctrl-names : a pinctrl state named "default" must be defined. [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/hwmon/ |
| D | npcm750-pwm-fan.txt | 1 Nuvoton NPCM7xx PWM and Fan Tacho controller device 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) 4 controller outputs and 16 Fan tachometer controller inputs. 6 Required properties for pwm-fan node 7 - #address-cells : should be 1. 8 - #size-cells : should be 0. 9 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. 10 - reg : specifies physical base address and size of the registers. 11 - reg-names : must contain: 12 * "pwm" for the PWM registers. [all …]
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| D | aspeed-pwm-tacho.txt | 1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver 3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho 4 controller can support upto 16 Fan tachometer inputs. 6 There can be upto 8 fans supported. Each fan can have one PWM output and 9 Required properties for pwm-tacho node: 10 - #address-cells : should be 1. 12 - #size-cells : should be 1. 14 - #cooling-cells: should be 2. 16 - reg : address and length of the register set for the device. 18 - pinctrl-names : a pinctrl state named "default" must be defined. [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | kontron,sl28cpld.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Kontron's sl28cpld board management controller 10 - Michael Walle <michael@walle.cc> 13 The board management controller may contain different IP blocks like 14 watchdog, fan monitoring, PWM controller, interrupt controller and a 15 GPIO controller. 26 "#address-cells": 29 "#size-cells": [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | kontron,sl28cpld.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Kontron's sl28cpld board management controller 10 - Michael Walle <michael@walle.cc> 13 The board management controller may contain different IP blocks like 14 watchdog, fan monitoring, PWM controller, interrupt controller and a 15 GPIO controller. 26 "#address-cells": 29 "#size-cells": [all …]
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| D | netronix,ntxec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Netronix Embedded Controller 10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net> 13 This EC is found in e-book readers of multiple brands (e.g. Kobo, Tolino), and 22 - description: The I2C address of the EC 24 system-power-controller: 26 description: See Documentation/devicetree/bindings/power/power-controller.txt 33 "#pwm-cells": [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pwm/ |
| D | mediatek,mt2712-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek PWM Controller 10 - John Crispin <john@phrozen.org> 13 - $ref: pwm.yaml# 18 - enum: 19 - mediatek,mt2712-pwm 20 - mediatek,mt6795-pwm [all …]
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| D | pwm.txt | 1 Specifying PWM information for devices 4 1) PWM user nodes 5 ----------------- 7 PWM users should specify a list of PWM devices that they want to use 8 with a property containing a 'pwm-list': 10 pwm-list ::= <single-pwm> [pwm-list] 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 12 pwm-phandle : phandle to PWM controller node 13 pwm-specifier : array of #pwm-cells specifying the given PWM 14 (controller specific) [all …]
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| D | pwm-sprd.txt | 1 Spreadtrum PWM controller 3 Spreadtrum SoCs PWM controller provides 4 PWM channels. 6 - compatible : Should be "sprd,ums512-pwm". 7 - reg: Physical base address and length of the controller's registers. 8 - clocks: The phandle and specifier referencing the controller's clocks. 9 - clock-names: Should contain following entries: 10 "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3). 11 "enablen": for PWM channel n enable clock (n range: 0 ~ 3). 12 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of 16 - assigned-clocks: Reference to the PWM clock entries. [all …]
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| D | pwm-hibvt.txt | 1 Hisilicon PWM controller 4 -compatible: should contain one SoC specific compatible string 6 "hisilicon,hi3516cv300-pwm" 7 "hisilicon,hi3519v100-pwm" 8 "hisilicon,hi3559v100-shub-pwm" 9 "hisilicon,hi3559v100-pwm 10 - reg: physical base address and length of the controller's registers. 11 - clocks: phandle and clock specifier of the PWM reference clock. 12 - resets: phandle and reset specifier for the PWM controller reset. 13 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of [all …]
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| D | mediatek,pwm-disp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek DISP_PWM Controller 10 - Jitao Shi <jitao.shi@mediatek.com> 11 - Xinlei Lee <xinlei.lee@mediatek.com> 14 - $ref: pwm.yaml# 19 - enum: 20 - mediatek,mt2701-disp-pwm [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/ |
| D | pwm.txt | 1 Specifying PWM information for devices 4 1) PWM user nodes 5 ----------------- 7 PWM users should specify a list of PWM devices that they want to use 8 with a property containing a 'pwm-list': 10 pwm-list ::= <single-pwm> [pwm-list] 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 12 pwm-phandle : phandle to PWM controller node 13 pwm-specifier : array of #pwm-cells specifying the given PWM 14 (controller specific) [all …]
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| D | pwm-sprd.txt | 1 Spreadtrum PWM controller 3 Spreadtrum SoCs PWM controller provides 4 PWM channels. 6 - compatible : Should be "sprd,ums512-pwm". 7 - reg: Physical base address and length of the controller's registers. 8 - clocks: The phandle and specifier referencing the controller's clocks. 9 - clock-names: Should contain following entries: 10 "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3). 11 "enablen": for PWM channel n enable clock (n range: 0 ~ 3). 12 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of 16 - assigned-clocks: Reference to the PWM clock entries. [all …]
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| D | pwm-zx.txt | 1 ZTE ZX PWM controller 4 - compatible: Should be "zte,zx296718-pwm". 5 - reg: Physical base address and length of the controller's registers. 6 - clocks : The phandle and specifier referencing the controller's clocks. 7 - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The 10 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 15 pwm: pwm@1439000 { 16 compatible = "zte,zx296718-pwm"; 20 clock-names = "pclk", "wclk"; 21 #pwm-cells = <3>;
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| D | pwm-hibvt.txt | 1 Hisilicon PWM controller 4 -compatible: should contain one SoC specific compatible string 6 "hisilicon,hi3516cv300-pwm" 7 "hisilicon,hi3519v100-pwm" 8 "hisilicon,hi3559v100-shub-pwm" 9 "hisilicon,hi3559v100-pwm 10 - reg: physical base address and length of the controller's registers. 11 - clocks: phandle and clock specifier of the PWM reference clock. 12 - resets: phandle and reset specifier for the PWM controller reset. 13 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of [all …]
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| D | brcm,bcm7038-pwm.txt | 1 Broadcom BCM7038 PWM controller (BCM7xxx Set Top Box PWM controller) 5 - compatible: must be "brcm,bcm7038-pwm" 6 - reg: physical base address and length for this controller 7 - #pwm-cells: should be 2. See pwm.yaml in this directory for a description 9 - clocks: a phandle to the reference clock for this block which is fed through 15 pwm: pwm@f0408000 { 16 compatible = "brcm,bcm7038-pwm"; 18 #pwm-cells = <2>;
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| D | pwm-bcm2835.txt | 1 BCM2835 PWM controller (Raspberry Pi controller) 4 - compatible: should be "brcm,bcm2835-pwm" 5 - reg: physical base address and length of the controller's registers 6 - clocks: This clock defines the base clock frequency of the PWM hardware 7 system, the period and the duty_cycle of the PWM signal is a multiple of 9 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 14 pwm@2020c000 { 15 compatible = "brcm,bcm2835-pwm"; 18 #pwm-cells = <3>; 23 clk_pwm: pwm { [all …]
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| D | brcm,kona-pwm.txt | 1 Broadcom Kona PWM controller device tree bindings 3 This controller has 6 channels. 6 - compatible: should contain "brcm,kona-pwm" 7 - reg: physical base address and length of the controller's registers 8 - clocks: phandle + clock specifier pair for the external clock 9 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a 12 Refer to clocks/clock-bindings.txt for generic clock consumer properties. 16 pwm: pwm@3e01a000 { 17 compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm"; 20 #pwm-cells = <3>;
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| D | brcm,iproc-pwm.txt | 1 Broadcom iProc PWM controller device tree bindings 3 This controller has 4 channels. 6 - compatible: must be "brcm,iproc-pwm" 7 - reg: physical base address and length of the controller's registers 8 - clocks: phandle + clock specifier pair for the external clock 9 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a 12 Refer to clocks/clock-bindings.txt for generic clock consumer properties. 16 pwm: pwm@18031000 { 17 compatible = "brcm,iproc-pwm"; 20 #pwm-cells = <3>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/ |
| D | gpio-mvebu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell EBU GPIO controller 10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 - Andrew Lunn <andrew@lunn.ch> 16 - enum: 17 - marvell,armada-8k-gpio 18 - marvell,orion-gpio [all …]
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