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/kernel/linux/linux-6.6/include/linux/
Dpwm.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 * enum pwm_polarity - polarity of a PWM signal
13 * @PWM_POLARITY_NORMAL: a high signal for the duration of the duty-
15 * period
16 * @PWM_POLARITY_INVERSED: a low signal for the duration of the duty-
18 * period
26 * struct pwm_args - board-dependent PWM arguments
27 * @period: reference period
30 * This structure describes board-dependent arguments attached to a PWM
31 * device. These arguments are usually retrieved from the PWM lookup table or
[all …]
/kernel/linux/linux-5.10/include/linux/
Dpwm.h1 /* SPDX-License-Identifier: GPL-2.0 */
15 * enum pwm_polarity - polarity of a PWM signal
16 * @PWM_POLARITY_NORMAL: a high signal for the duration of the duty-
18 * period
19 * @PWM_POLARITY_INVERSED: a low signal for the duration of the duty-
21 * period
29 * struct pwm_args - board-dependent PWM arguments
30 * @period: reference period
33 * This structure describes board-dependent arguments attached to a PWM
34 * device. These arguments are usually retrieved from the PWM lookup table or
[all …]
/kernel/linux/linux-6.6/drivers/pwm/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2011-2012 Avionic Design GmbH
12 #include <linux/pwm.h>
21 #include <dt-bindings/pwm/pwm.h>
24 #include <trace/events/pwm.h>
46 return -ENOSPC; in alloc_pwms()
56 bitmap_clear(allocated_pwms, chip->base, chip->npwm); in free_pwms()
58 kfree(chip->pwms); in free_pwms()
59 chip->pwms = NULL; in free_pwms()
72 const char *chip_name = dev_name(chip->dev); in pwmchip_find_by_name()
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Dpwm-visconti.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Toshiba Visconti pulse-width-modulation controller driver
5 * Copyright (c) 2020 - 2021 TOSHIBA CORPORATION
6 * Copyright (c) 2020 - 2021 Toshiba Electronic Devices & Storage Corporation
11 * - The fixed input clock is running at 1 MHz and is divided by either 1,
13 * - When the settings of the PWM are modified, the new values are shadowed
15 * running period is completed. This way the hardware switches atomically
17 * - Disabling the hardware completes the currently running period and keeps
26 #include <linux/pwm.h>
46 static int visconti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, in visconti_pwm_apply() argument
[all …]
Dpwm-microchip-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2021-2023 Microchip Corporation. All rights reserved.
8 * https://www.microsemi.com/document-portal/doc_download/1245275-corepwm-hb
11 * - If the IP block is configured without "shadow registers", all register
17 * As setting the period/duty cycle takes 4 register writes, there is a window
18 * in which this races against the start of a new period.
19 * - The IP block has no concept of a duty cycle, only rising/falling edges of
23 * period. Therefore to get a 0% waveform, the output is set the max high/low
25 * If the duty cycle is 0%, and the requested period is less than the
26 * available period resolution, this will manifest as a ~100% waveform (with
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Dpwm-jz4740.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
4 * JZ4740 platform PWM support
7 * - The .apply callback doesn't complete the currently running period before
15 #include <linux/mfd/ingenic-tcu.h>
20 #include <linux/pwm.h>
40 /* Enable all TCU channels for PWM use by default except channels 0/1 */ in jz4740_pwm_can_use_chn()
41 u32 pwm_channels_mask = GENMASK(jz->chip.npwm - 1, 2); in jz4740_pwm_can_use_chn()
43 device_property_read_u32(jz->chip.dev->parent, in jz4740_pwm_can_use_chn()
44 "ingenic,pwm-channels-mask", in jz4740_pwm_can_use_chn()
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Dpwm-fsl-ftm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale FlexTimer Module (FTM) PWM Driver
5 * Copyright 2012-2013 Freescale Semiconductor, Inc.
17 #include <linux/pwm.h>
47 /* This value is valid iff a pwm is running */
48 struct fsl_pwm_periodcfg period; member
65 regmap_read(fpc->regmap, FTM_FMS, &val); in ftm_clear_write_protection()
67 regmap_set_bits(fpc->regmap, FTM_MODE, FTM_MODE_WPDIS); in ftm_clear_write_protection()
72 regmap_set_bits(fpc->regmap, FTM_FMS, FTM_FMS_WPEN); in ftm_set_write_protection()
78 if (a->clk_select != b->clk_select) in fsl_pwm_periodcfg_are_equal()
[all …]
Dpwm-omap-dmtimer.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Also based on pwm-samsung.c
13 * PWM driver / controller, using the OMAP's dual-mode timers
15 * reloaded with the load value and the pwm output goes up.
20 * - When PWM is stopped, timer counter gets stopped immediately. This
21 * doesn't allow the current PWM period to complete and stops abruptly.
22 * - When PWM is running and changing both duty cycle and period,
24 * a period with mixed settings. Especially when period/duty_cyle
25 * is updated while the pwm pin is high, current pwm period/duty_cycle
27 * - period for current cycle = current_period + new period
[all …]
Dpwm-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/pwm.h>
17 #define PWM_MODE 0x80 /* set timer in PWM mode */
21 #define PERIOD(x) (((x) * 0x10) + 0x10) macro
38 static int bcm2835_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) in bcm2835_pwm_request() argument
43 value = readl(pc->base + PWM_CONTROL); in bcm2835_pwm_request()
44 value &= ~(PWM_CONTROL_MASK << PWM_CONTROL_SHIFT(pwm->hwpwm)); in bcm2835_pwm_request()
45 value |= (PWM_MODE << PWM_CONTROL_SHIFT(pwm->hwpwm)); in bcm2835_pwm_request()
46 writel(value, pc->base + PWM_CONTROL); in bcm2835_pwm_request()
51 static void bcm2835_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) in bcm2835_pwm_free() argument
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Dpwm-atmel.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Links to reference manuals for the supported PWM chips can be found in
12 * - Periods start with the inactive level.
13 * - Hardware has to be stopped in general to update settings.
16 * - When atmel_pwm_apply() is called with state->enabled=false a change in
17 * state->polarity isn't honored.
18 * - Instead of sleeping to wait for a completed period, the interrupt
29 #include <linux/pwm.h>
32 /* The following is global registers for PWM controller */
40 /* The following register is PWM channel related registers */
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Dpwm-imx-tpm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2019 NXP.
6 * - The TPM counter and period counter are shared between
7 * multiple channels, so all channels should use same period
9 * - Changes to polarity cannot be latched at the time of the
10 * next period start.
11 * - Changing period and duty cycle together isn't atomic,
12 * with the wrong timing it might happen that a period is
13 * produced with old duty cycle but new period settings.
24 #include <linux/pwm.h>
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Dpwm-imx27.c1 // SPDX-License-Identifier: GPL-2.0
3 * simple driver for PWM (Pulse Width Modulator) controller
5 * Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
8 * - When disabled the output is driven to 0 independent of the configured
22 #include <linux/pwm.h>
25 #define MX3_PWMCR 0x00 /* PWM Control Register */
26 #define MX3_PWMSR 0x04 /* PWM Status Register */
27 #define MX3_PWMSAR 0x0C /* PWM Sample Register */
28 #define MX3_PWMPR 0x10 /* PWM Period Register */
29 #define MX3_PWMCNR 0x14 /* PWM Counter Register */
[all …]
/kernel/linux/linux-5.10/drivers/pwm/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2011-2012 Avionic Design GmbH
11 #include <linux/pwm.h>
12 #include <linux/radix-tree.h>
21 #include <dt-bindings/pwm/pwm.h>
24 #include <trace/events/pwm.h>
35 static struct pwm_device *pwm_to_device(unsigned int pwm) in pwm_to_device() argument
37 return radix_tree_lookup(&pwm_tree, pwm); in pwm_to_device()
40 static int alloc_pwms(int pwm, unsigned int count) in alloc_pwms() argument
45 if (pwm >= MAX_PWMS) in alloc_pwms()
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Dpwm-renesas-tpu.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Mobile TPU PWM driver
18 #include <linux/pwm.h>
63 TPU_PIN_PWM, /* Pin is driven by PWM */
77 u16 period; member
92 static void tpu_pwm_write(struct tpu_pwm_device *pwm, int reg_nr, u16 value) in tpu_pwm_write() argument
94 void __iomem *base = pwm->tpu->base + TPU_CHANNEL_OFFSET in tpu_pwm_write()
95 + pwm->channel * TPU_CHANNEL_SIZE; in tpu_pwm_write()
100 static void tpu_pwm_set_pin(struct tpu_pwm_device *pwm, in tpu_pwm_set_pin() argument
103 static const char * const states[] = { "inactive", "PWM", "active" }; in tpu_pwm_set_pin()
[all …]
Dpwm-jz4740.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
4 * JZ4740 platform PWM support
7 * - The .apply callback doesn't complete the currently running period before
15 #include <linux/mfd/ingenic-tcu.h>
20 #include <linux/pwm.h>
40 /* Enable all TCU channels for PWM use by default except channels 0/1 */ in jz4740_pwm_can_use_chn()
41 u32 pwm_channels_mask = GENMASK(jz->chip.npwm - 1, 2); in jz4740_pwm_can_use_chn()
43 device_property_read_u32(jz->chip.dev->parent, in jz4740_pwm_can_use_chn()
44 "ingenic,pwm-channels-mask", in jz4740_pwm_can_use_chn()
[all …]
Dpwm-omap-dmtimer.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Also based on pwm-samsung.c
13 * PWM driver / controller, using the OMAP's dual-mode timers
15 * reloaded with the load value and the pwm output goes up.
20 * - When PWM is stopped, timer counter gets stopped immediately. This
21 * doesn't allow the current PWM period to complete and stops abruptly.
22 * - When PWM is running and changing both duty cycle and period,
24 * a period with mixed settings. Especially when period/duty_cyle
25 * is updated while the pwm pin is high, current pwm period/duty_cycle
27 * - period for current cycle = current_period + new period
[all …]
Dpwm-atmel.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Links to reference manuals for the supported PWM chips can be found in
12 * - Periods start with the inactive level.
13 * - Hardware has to be stopped in general to update settings.
16 * - When atmel_pwm_apply() is called with state->enabled=false a change in
17 * state->polarity isn't honored.
18 * - Instead of sleeping to wait for a completed period, the interrupt
31 #include <linux/pwm.h>
34 /* The following is global registers for PWM controller */
42 /* The following register is PWM channel related registers */
[all …]
Dpwm-fsl-ftm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale FlexTimer Module (FTM) PWM Driver
5 * Copyright 2012-2013 Freescale Semiconductor, Inc.
18 #include <linux/pwm.h>
48 /* This value is valid iff a pwm is running */
49 struct fsl_pwm_periodcfg period; member
66 regmap_read(fpc->regmap, FTM_FMS, &val); in ftm_clear_write_protection()
68 regmap_update_bits(fpc->regmap, FTM_MODE, FTM_MODE_WPDIS, in ftm_clear_write_protection()
74 regmap_update_bits(fpc->regmap, FTM_FMS, FTM_FMS_WPEN, FTM_FMS_WPEN); in ftm_set_write_protection()
80 if (a->clk_select != b->clk_select) in fsl_pwm_periodcfg_are_equal()
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Dpwm-sun4i.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 * - When outputing the source clock directly, the PWM logic will be bypassed
9 * and the currently running period is not guaranteed to be completed
22 #include <linux/pwm.h>
48 #define PWM_PRD(prd) (((prd) - 1) << 16)
103 return readl(chip->base + offset); in sun4i_pwm_readl()
109 writel(val, chip->base + offset); in sun4i_pwm_writel()
113 struct pwm_device *pwm, in sun4i_pwm_get_state() argument
121 clk_rate = clk_get_rate(sun4i_pwm->clk); in sun4i_pwm_get_state()
[all …]
Dpwm-imx-tpm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2018-2019 NXP.
6 * - The TPM counter and period counter are shared between
7 * multiple channels, so all channels should use same period
9 * - Changes to polarity cannot be latched at the time of the
10 * next period start.
11 * - Changing period and duty cycle together isn't atomic,
12 * with the wrong timing it might happen that a period is
13 * produced with old duty cycle but new period settings.
24 #include <linux/pwm.h>
[all …]
/kernel/linux/linux-5.10/drivers/clk/
Dclk-pwm.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * PWM (mis)used as clock output
7 #include <linux/clk-provider.h>
12 #include <linux/pwm.h>
16 struct pwm_device *pwm; member
29 return pwm_enable(clk_pwm->pwm); in clk_pwm_prepare()
36 pwm_disable(clk_pwm->pwm); in clk_pwm_unprepare()
44 return clk_pwm->fixed_rate; in clk_pwm_recalc_rate()
52 pwm_get_state(clk_pwm->pwm, &state); in clk_pwm_get_duty_cycle()
54 duty->num = state.duty_cycle; in clk_pwm_get_duty_cycle()
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/kernel/linux/linux-6.6/drivers/clk/
Dclk-pwm.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * PWM (mis)used as clock output
7 #include <linux/clk-provider.h>
12 #include <linux/pwm.h>
16 struct pwm_device *pwm; member
29 return pwm_enable(clk_pwm->pwm); in clk_pwm_prepare()
36 pwm_disable(clk_pwm->pwm); in clk_pwm_unprepare()
44 return clk_pwm->fixed_rate; in clk_pwm_recalc_rate()
52 pwm_get_state(clk_pwm->pwm, &state); in clk_pwm_get_duty_cycle()
54 duty->num = state.duty_cycle; in clk_pwm_get_duty_cycle()
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/kernel/linux/linux-5.10/Documentation/driver-api/
Dpwm.rst2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
15 ----------------
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
36 ----------
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/kernel/linux/linux-6.6/Documentation/driver-api/
Dpwm.rst2 Pulse Width Modulation (PWM) interface
5 This provides an overview about the Linux PWM interface
9 the Linux PWM API (although they could). However, PWMs are often
12 this kind of flexibility the generic PWM API exists.
15 ----------------
17 Users of the legacy PWM API use unique IDs to refer to PWM devices.
19 Instead of referring to a PWM device via its unique ID, board setup code
20 should instead register a static mapping that can be used to match PWM
24 PWM_LOOKUP("tegra-pwm", 0, "pwm-backlight", NULL,
36 ----------
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/kernel/linux/linux-5.10/include/trace/events/
Dpwm.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #define TRACE_SYSTEM pwm
8 #include <linux/pwm.h>
11 DECLARE_EVENT_CLASS(pwm,
13 TP_PROTO(struct pwm_device *pwm, const struct pwm_state *state),
15 TP_ARGS(pwm, state),
18 __field(struct pwm_device *, pwm)
19 __field(u64, period)
26 __entry->pwm = pwm;
27 __entry->period = state->period;
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