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/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
14 stdout-path = "serial2:115200n8";
23 * - Rails that only connect to the EC (or devices that the EC talks to)
25 * - Rails _are_ included if the rails go to the AP even if the AP
34 * - The EC controls the enable and the EC always enables a rail as
36 * - The rails are actually connected to each other by a jumper and
41 ppvar_sys: ppvar-sys {
[all …]
Drk3368.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
19 stdout-path = "serial2:115200n8";
28 * - Rails that only connect to the EC (or devices that the EC talks to)
30 * - Rails _are_ included if the rails go to the AP even if the AP
39 * - The EC controls the enable and the EC always enables a rail as
41 * - The rails are actually connected to each other by a jumper and
46 ppvar_sys: ppvar-sys {
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <1>;
16 #size-cells = <1>;
18 arm-pmu {
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
16 interrupt-parent = <&gic>;
[all …]
Dimx6qdl-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 or MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/input/input.h>
12 model = "emtrion SoM emCON-MX6";
13 compatible = "emtrion,emcon-mx6";
23 stdout-path = &uart1;
31 gpio-keys {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mt7622.txt4 - compatible: Should be one of the following
5 "mediatek,mt7622-pinctrl" for MT7622 SoC
6 "mediatek,mt7629-pinctrl" for MT7629 SoC
7 - reg: offset and length of the pinctrl space
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells: Should be two. The first cell is the pin number and the
14 - interrupt-controller : Marks the device node as an interrupt controller
16 If the property interrupt-controller is defined, following property is required
17 - reg-names: A string describing the "reg" entries. Must contain "eint".
18 - interrupts : The interrupt output from the controller.
[all …]
Dmarvell,armada-37xx-pinctrl.txt12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
33 - pins 20-24
34 - functions jtag, gpio
37 - pins 8-10
38 - functions sdio, gpio
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dnvidia,tegra20-pwm.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pwm": for Tegra20
6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11 - "nvidia,tegra186-pwm": for Tegra186
12 - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/input/input.h>
12 model = "emtrion SoM emCON-MX6";
13 compatible = "emtrion,emcon-mx6";
23 stdout-path = &uart1;
31 gpio-keys {
32 compatible = "gpio-keys";
33 pinctrl-names = "default";
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dmarvell,armada-37xx-pinctrl.txt12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
33 - pins 20-24
34 - functions jtag, gpio
37 - pins 8-10
38 - functions sdio, gpio
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8916-samsung-gt510.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-samsung-gt5-common.dtsi"
10 chassis-type = "tablet";
12 clk_pwm: pwm {
13 compatible = "clk-pwm";
14 #pwm-cells = <2>;
18 pinctrl-0 = <&motor_pwm_default>;
19 pinctrl-names = "default";
22 reg_motor_vdd: regulator-motor-vdd {
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
Domap4-epson-embt2ws.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 /dts-v1/;
7 #include <dt-bindings/input/input.h>
11 model = "Epson Moverio BT-200";
19 backlight-left {
20 compatible = "pwm-backlight";
22 power-supply = <&unknown_supply>;
25 backlight-right {
26 compatible = "pwm-backlight";
28 power-supply = <&unknown_supply>;
[all …]
/kernel/linux/linux-6.6/Documentation/hwmon/
Ducd9000.rst11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd90120.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd90124.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd90160.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd90320.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9090.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd90910.pdf
22 Author: Guenter Roeck <linux@roeck-us.net>
26 -----------
31 sequences up to 12 independent voltage rails. The device integrates a 12-bit
[all …]
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
46 A "0" configures the VID pins for V(ih) = 2.1V min, V(il) = 0.8V max.
[all …]
/kernel/linux/linux-5.10/Documentation/hwmon/
Ducd9000.rst11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd90120.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd90124.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd90160.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd90320.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9090.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd90910.pdf
22 Author: Guenter Roeck <linux@roeck-us.net>
26 -----------
31 sequences up to 12 independent voltage rails. The device integrates a 12-bit
[all …]
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
46 A "0" configures the VID pins for V(ih) = 2.1V min, V(il) = 0.8V max.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/
Dpwm-vibrator.txt1 * PWM vibrator device tree bindings
3 Registers a PWM device as vibrator. It is expected, that the vibrator's
4 strength increases based on the duty cycle of the enable PWM channel
7 The binding supports an optional direction PWM channel, that can be
12 - compatible: should contain "pwm-vibrator"
13 - pwm-names: Should contain "enable" and optionally "direction"
14 - pwms: Should contain a PWM handle for each entry in pwm-names
17 - vcc-supply: Phandle for the regulator supplying power
18 - direction-duty-cycle-ns: Duty cycle of the direction PWM channel in
26 pinctrl-single,pins = <
[all …]

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