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/kernel/linux/linux-5.10/arch/x86/platform/intel-mid/
Dpwr.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * pci_platform_pm_ops (see drivers/pci/pci-mid.c).
27 #include <asm/intel-mid.h>
106 static u32 mid_pwr_get_state(struct mid_pwr *pwr, int reg) in mid_pwr_get_state() argument
108 return readl(pwr->regs + PM_SSS(reg)); in mid_pwr_get_state()
111 static void mid_pwr_set_state(struct mid_pwr *pwr, int reg, u32 value) in mid_pwr_set_state() argument
113 writel(value, pwr->regs + PM_SSC(reg)); in mid_pwr_set_state()
116 static void mid_pwr_set_wake(struct mid_pwr *pwr, int reg, u32 value) in mid_pwr_set_wake() argument
118 writel(value, pwr->regs + PM_WKC(reg)); in mid_pwr_set_wake()
121 static void mid_pwr_interrupt_disable(struct mid_pwr *pwr) in mid_pwr_interrupt_disable() argument
[all …]
/kernel/linux/linux-6.6/arch/x86/platform/intel-mid/
Dpwr.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * pci_platform_pm_ops (see drivers/pci/pci-mid.c).
27 #include <asm/intel-mid.h>
106 static u32 mid_pwr_get_state(struct mid_pwr *pwr, int reg) in mid_pwr_get_state() argument
108 return readl(pwr->regs + PM_SSS(reg)); in mid_pwr_get_state()
111 static void mid_pwr_set_state(struct mid_pwr *pwr, int reg, u32 value) in mid_pwr_set_state() argument
113 writel(value, pwr->regs + PM_SSC(reg)); in mid_pwr_set_state()
116 static void mid_pwr_set_wake(struct mid_pwr *pwr, int reg, u32 value) in mid_pwr_set_wake() argument
118 writel(value, pwr->regs + PM_WKC(reg)); in mid_pwr_set_wake()
121 static void mid_pwr_interrupt_disable(struct mid_pwr *pwr) in mid_pwr_interrupt_disable() argument
[all …]
/kernel/linux/linux-6.6/drivers/input/misc/
Dmc13783-pwrbutton.c4 * Based on twl4030-pwrbutton driver by:
5 * Peter De Schrijver <peter.de-schrijver@nokia.com>
19 * Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335 USA
33 struct input_dev *pwr; member
60 mc13xxx_irq_ack(priv->mc13783, irq); in button_irq()
61 mc13xxx_reg_read(priv->mc13783, MC13783_REG_INTERRUPT_SENSE_1, &val); in button_irq()
66 if (priv->flags & MC13783_PWRB_B1_POL_INVERT) in button_irq()
68 input_report_key(priv->pwr, priv->keymap[0], val); in button_irq()
73 if (priv->flags & MC13783_PWRB_B2_POL_INVERT) in button_irq()
75 input_report_key(priv->pwr, priv->keymap[1], val); in button_irq()
[all …]
Dtps65218-pwrbutton.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
7 * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
49 { .compatible = "ti,tps65217-pwrbutton", .data = &tps65217_data },
50 { .compatible = "ti,tps65218-pwrbutton", .data = &tps65218_data },
57 struct tps6521x_pwrbutton *pwr = _pwr; in tps6521x_pb_irq() local
58 const struct tps6521x_data *tps_data = pwr->data; in tps6521x_pb_irq()
59 unsigned int reg; in tps6521x_pb_irq() local
62 error = regmap_read(pwr->regmap, tps_data->reg_status, &reg); in tps6521x_pb_irq()
64 dev_err(pwr->dev, "can't read register: %d\n", error); in tps6521x_pb_irq()
[all …]
Dpmic8xxx-pwrkey.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
71 * struct pmic8xxx_pwrkey - pmic8xxx pwrkey information
84 struct input_dev *pwr = _pwr; in pwrkey_press_irq() local
86 input_report_key(pwr, KEY_POWER, 1); in pwrkey_press_irq()
87 input_sync(pwr); in pwrkey_press_irq()
94 struct input_dev *pwr = _pwr; in pwrkey_release_irq() local
96 input_report_key(pwr, KEY_POWER, 0); in pwrkey_release_irq()
97 input_sync(pwr); in pwrkey_release_irq()
107 enable_irq_wake(pwrkey->key_press_irq); in pmic8xxx_pwrkey_suspend()
[all …]
/kernel/linux/linux-5.10/drivers/input/misc/
Dmc13783-pwrbutton.c4 * Based on twl4030-pwrbutton driver by:
5 * Peter De Schrijver <peter.de-schrijver@nokia.com>
19 * Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335 USA
33 struct input_dev *pwr; member
60 mc13xxx_irq_ack(priv->mc13783, irq); in button_irq()
61 mc13xxx_reg_read(priv->mc13783, MC13783_REG_INTERRUPT_SENSE_1, &val); in button_irq()
66 if (priv->flags & MC13783_PWRB_B1_POL_INVERT) in button_irq()
68 input_report_key(priv->pwr, priv->keymap[0], val); in button_irq()
73 if (priv->flags & MC13783_PWRB_B2_POL_INVERT) in button_irq()
75 input_report_key(priv->pwr, priv->keymap[1], val); in button_irq()
[all …]
Dtps65218-pwrbutton.c4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
6 * Author: Marcin Niestroj <m.niestroj@grinn-global.com>
57 { .compatible = "ti,tps65217-pwrbutton", .data = &tps65217_data },
58 { .compatible = "ti,tps65218-pwrbutton", .data = &tps65218_data },
65 struct tps6521x_pwrbutton *pwr = _pwr; in tps6521x_pb_irq() local
66 const struct tps6521x_data *tps_data = pwr->data; in tps6521x_pb_irq()
67 unsigned int reg; in tps6521x_pb_irq() local
70 error = regmap_read(pwr->regmap, tps_data->reg_status, &reg); in tps6521x_pb_irq()
72 dev_err(pwr->dev, "can't read register: %d\n", error); in tps6521x_pb_irq()
76 if (reg & tps_data->pb_mask) { in tps6521x_pb_irq()
[all …]
Dpmic8xxx-pwrkey.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
72 * struct pmic8xxx_pwrkey - pmic8xxx pwrkey information
85 struct input_dev *pwr = _pwr; in pwrkey_press_irq() local
87 input_report_key(pwr, KEY_POWER, 1); in pwrkey_press_irq()
88 input_sync(pwr); in pwrkey_press_irq()
95 struct input_dev *pwr = _pwr; in pwrkey_release_irq() local
97 input_report_key(pwr, KEY_POWER, 0); in pwrkey_release_irq()
98 input_sync(pwr); in pwrkey_release_irq()
108 enable_irq_wake(pwrkey->key_press_irq); in pmic8xxx_pwrkey_suspend()
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/
Disil,isl12026.txt5 at bus address 0x57. The canonical "reg" value will be for the RTC portion.
9 - "compatible": must be "isil,isl12026"
10 - "reg": I2C bus address of the device (always 0x6f)
14 - "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
17 - "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
25 reg = <0x6f>;
26 isil,pwr-bsw = <0>;
27 isil,pwr-sbib = <1>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/
Disil,isl12026.txt5 at bus address 0x57. The canonical "reg" value will be for the RTC portion.
9 - "compatible": must be "isil,isl12026"
10 - "reg": I2C bus address of the device (always 0x6f)
14 - "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
17 - "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
25 reg = <0x6f>;
26 isil,pwr-bsw = <0>;
27 isil,pwr-sbib = <1>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/
Dst,stm32mp1-pwr-reg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32MP1 PWR voltage regulators
10 - Pascal Paillet <p.paillet@st.com>
14 const: st,stm32mp1,pwr-reg
16 reg:
19 vdd-supply:
22 vdd_3v3_usbfs-supply:
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/
Dst,stm32mp1-pwr-reg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32MP1 PWR voltage regulators
10 - Pascal Paillet <p.paillet@foss.st.com>
14 const: st,stm32mp1,pwr-reg
16 reg:
19 vdd-supply:
22 vdd_3v3_usbfs-supply:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra20-pmc
18 - nvidia,tegra30-pmc
19 - nvidia,tegra114-pmc
[all …]
/kernel/linux/linux-6.6/drivers/phy/samsung/
Dphy-s5pv210-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support
12 #include "phy-samsung-usb2.h"
70 static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg) in s5pv210_rate_to_clk() argument
74 *reg = S5PV210_UPHYCLK_PHYFSEL_12MHZ; in s5pv210_rate_to_clk()
77 *reg = S5PV210_UPHYCLK_PHYFSEL_24MHZ; in s5pv210_rate_to_clk()
80 *reg = S5PV210_UPHYCLK_PHYFSEL_48MHZ; in s5pv210_rate_to_clk()
83 return -EINVAL; in s5pv210_rate_to_clk()
91 struct samsung_usb2_phy_driver *drv = inst->drv; in s5pv210_isol()
94 switch (inst->cfg->id) { in s5pv210_isol()
[all …]
Dphy-exynos4210-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4210 support
13 #include "phy-samsung-usb2.h"
87 /* Mode switching SUB Device <-> Host */
105 static int exynos4210_rate_to_clk(unsigned long rate, u32 *reg) in exynos4210_rate_to_clk() argument
109 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_12MHZ; in exynos4210_rate_to_clk()
112 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_24MHZ; in exynos4210_rate_to_clk()
115 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_48MHZ; in exynos4210_rate_to_clk()
118 return -EINVAL; in exynos4210_rate_to_clk()
126 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4210_isol()
[all …]
Dphy-exynos4x12-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4x12 support
13 #include "phy-samsung-usb2.h"
114 /* Mode switching SUB Device <-> Host */
132 static int exynos4x12_rate_to_clk(unsigned long rate, u32 *reg) in exynos4x12_rate_to_clk() argument
138 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_9MHZ6; in exynos4x12_rate_to_clk()
141 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_10MHZ; in exynos4x12_rate_to_clk()
144 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_12MHZ; in exynos4x12_rate_to_clk()
147 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_19MHZ2; in exynos4x12_rate_to_clk()
150 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_20MHZ; in exynos4x12_rate_to_clk()
[all …]
/kernel/linux/linux-5.10/drivers/phy/samsung/
Dphy-s5pv210-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support
12 #include "phy-samsung-usb2.h"
70 static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg) in s5pv210_rate_to_clk() argument
74 *reg = S5PV210_UPHYCLK_PHYFSEL_12MHZ; in s5pv210_rate_to_clk()
77 *reg = S5PV210_UPHYCLK_PHYFSEL_24MHZ; in s5pv210_rate_to_clk()
80 *reg = S5PV210_UPHYCLK_PHYFSEL_48MHZ; in s5pv210_rate_to_clk()
83 return -EINVAL; in s5pv210_rate_to_clk()
91 struct samsung_usb2_phy_driver *drv = inst->drv; in s5pv210_isol()
94 switch (inst->cfg->id) { in s5pv210_isol()
[all …]
Dphy-exynos4210-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4210 support
13 #include "phy-samsung-usb2.h"
87 /* Mode switching SUB Device <-> Host */
105 static int exynos4210_rate_to_clk(unsigned long rate, u32 *reg) in exynos4210_rate_to_clk() argument
109 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_12MHZ; in exynos4210_rate_to_clk()
112 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_24MHZ; in exynos4210_rate_to_clk()
115 *reg = EXYNOS_4210_UPHYCLK_PHYFSEL_48MHZ; in exynos4210_rate_to_clk()
118 return -EINVAL; in exynos4210_rate_to_clk()
126 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos4210_isol()
[all …]
Dphy-exynos4x12-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 4x12 support
13 #include "phy-samsung-usb2.h"
114 /* Mode switching SUB Device <-> Host */
132 static int exynos4x12_rate_to_clk(unsigned long rate, u32 *reg) in exynos4x12_rate_to_clk() argument
138 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_9MHZ6; in exynos4x12_rate_to_clk()
141 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_10MHZ; in exynos4x12_rate_to_clk()
144 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_12MHZ; in exynos4x12_rate_to_clk()
147 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_19MHZ2; in exynos4x12_rate_to_clk()
150 *reg = EXYNOS_4x12_UPHYCLK_PHYFSEL_20MHZ; in exynos4x12_rate_to_clk()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt4 - compatible: "nvidia,<gpu>"
6 - nvidia,gk20a
7 - nvidia,gm20b
8 - nvidia,gp10b
9 - nvidia,gv11b
10 - reg: Physical base address and length of the controller's registers.
12 - first entry for bar0
13 - second entry for bar1
14 - interrupts: Must contain an entry for each entry in interrupt-names.
15 See ../interrupt-controller/interrupts.txt for details.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt4 - compatible: "nvidia,<gpu>"
6 - nvidia,gk20a
7 - nvidia,gm20b
8 - nvidia,gp10b
9 - nvidia,gv11b
10 - reg: Physical base address and length of the controller's registers.
12 - first entry for bar0
13 - second entry for bar1
14 - interrupts: Must contain an entry for each entry in interrupt-names.
15 See ../interrupt-controller/interrupts.txt for details.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/ata/
Dahci-st.txt6 - compatible : Must be "st,ahci"
7 - reg : Physical base addresses and length of register sets
8 - interrupts : Interrupt associated with the SATA device
9 - interrupt-names : Associated name must be; "hostc"
10 - clocks : The phandle for the clock
11 - clock-names : Associated name must be; "ahci_clk"
12 - phys : The phandle for the PHY port
13 - phy-names : Associated name must be; "ahci_phy"
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/
Dahci-st.txt6 - compatible : Must be "st,ahci"
7 - reg : Physical base addresses and length of register sets
8 - interrupts : Interrupt associated with the SATA device
9 - interrupt-names : Associated name must be; "hostc"
10 - clocks : The phandle for the clock
11 - clock-names : Associated name must be; "ahci_clk"
12 - phys : The phandle for the PHY port
13 - phy-names : Associated name must be; "ahci_phy"
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
[all …]
/kernel/linux/linux-6.6/drivers/rtc/
Drtc-isl12026.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/nvmem-provider.h>
42 static int isl12026_read_reg(struct i2c_client *client, int reg) in isl12026_read_reg() argument
44 u8 addr[] = {0, reg}; in isl12026_read_reg()
50 .addr = client->addr, in isl12026_read_reg()
55 .addr = client->addr, in isl12026_read_reg()
62 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in isl12026_read_reg()
64 dev_err(&client->dev, "read reg error, ret=%d\n", ret); in isl12026_read_reg()
65 ret = ret < 0 ? ret : -EIO; in isl12026_read_reg()
78 .addr = client->addr, in isl12026_arm_write()
[all …]

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