Searched +full:qcom +full:- +full:mdm9615 +full:- +full:pinctrl +full:- +full:state (Results 1 – 4 of 4) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,mdm9615-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. MDM9615 TLMM block
10 - Bjorn Andersson <andersson@kernel.org>
12 description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC.
14 $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
18 const: qcom,mdm9615-pinctrl
26 interrupt-controller: true
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/ |
| D | qcom-mdm9615-wp8548.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 #include "qcom-mdm9615.dtsi"
13 compatible = "swir,wp8548", "qcom,mdm9615";
22 pinctrl-0 = <&reset_out_pins>;
23 pinctrl-names = "default";
25 gsbi3_pins: gsbi3-state {
26 gsbi3-pins {
29 drive-strength = <8>;
30 bias-disable;
34 gsbi4_pins: gsbi4-state {
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| D | qcom-mdm9615-wp8548-mangoh-green.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 #include <dt-bindings/input/input.h>
11 #include "qcom-mdm9615-wp8548.dtsi"
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "swir,mangoh-green-wp8548", "swir,wp8548", "qcom,mdm9615";
28 stdout-path = "serial1:115200n8";
34 * - 2 : GPIOEXP_INT2
35 * - 7 : IOT1_GPIO2
36 * - 8 : IOT0_GPIO4
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | qcom,usb-hsic-phy.txt | 5 - compatible:
8 Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
11 "qcom,usb-hsic-phy-mdm9615"
12 "qcom,usb-hsic-phy-msm8974"
14 - #phy-cells:
19 - clocks:
21 Value type: <prop-encoded-array>
25 - clock-names:
30 - pinctrl-names:
35 - pinctrl-0:
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