Searched +full:r9a06g032 +full:- +full:rtc (Results 1 – 5 of 5) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/ |
| D | renesas,rzn1-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/renesas,rzn1-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 SoCs Real-Time Clock
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: rtc.yaml#
18 - enum:
19 - renesas,r9a06g032-rtc
20 - const: renesas,rzn1-rtc
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/ |
| D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Base Device Tree Source for the Renesas RZ/N1D (R9A06G032)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
13 compatible = "renesas,r9a06g032";
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | renesas,r9a06g032-sysctrl.txt | 1 * Renesas R9A06G032 SYSCTRL
5 - compatible: Must be:
6 - "renesas,r9a06g032-sysctrl"
7 - reg: Base address and length of the SYSCTRL IO block.
8 - #clock-cells: Must be 1
9 - clocks: References to the parent clocks:
10 - external 40mhz crystal.
11 - external (optional) 32.768khz
12 - external (optional) jtag input
13 - external (optional) RGMII_REFCLK
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | renesas,r9a06g032-sysctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,r9a06g032-sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1D (R9A06G032) System Controller
10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
15 const: renesas,r9a06g032-sysctrl
23 - description: External 40 MHz crystal
24 - description: Optional external 32.768 kHz crystal
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Base Device Tree Source for the Renesas RZ/N1D (R9A06G032)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
13 compatible = "renesas,r9a06g032";
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
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