| /kernel/linux/linux-6.6/include/linux/mmc/ |
| D | host.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
17 #include <linux/dma-direction.h>
18 #include <linux/blk-crypto-profile.h>
141 * ios->clock might be 0. For some controllers, setting 0Hz
151 * 1 for a read-only card
152 * -ENOSYS when not supported (equal to NULL callback)
161 * -ENOSYS when not supported (equal to NULL callback)
178 /* The tuning command opcode value is different for SD and eMMC cards */
184 /* Execute HS400 tuning depending host driver */
[all …]
|
| /kernel/linux/linux-5.10/include/linux/mmc/ |
| D | host.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
17 #include <linux/dma-direction.h>
108 * ios->clock might be 0. For some controllers, setting 0Hz
118 * 1 for a read-only card
119 * -ENOSYS when not supported (equal to NULL callback)
128 * -ENOSYS when not supported (equal to NULL callback)
145 /* The tuning command opcode value is different for SD and eMMC cards */
181 /* Free resources, and make the CQE non-operational */
185 * effect of ->cqe_off().
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | marvell,xenon-sdhci.txt | 11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
17 - clocks:
22 - clock-names:
27 - reg:
28 * For "marvell,armada-3700-sdhci", two register areas.
31 Please follow the examples with compatible "marvell,armada-3700-sdhci"
[all …]
|
| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-xenon.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
21 #include "sdhci-pltfm.h"
22 #include "sdhci-xenon.h"
41 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
42 return -ETIMEDOUT; in xenon_enable_internal_clk()
50 /* Set SDCLK-off-while-idle */
91 host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in xenon_enable_sdhc()
96 host->mmc->caps &= ~MMC_CAP_BUS_WIDTH_TEST; in xenon_enable_sdhc()
137 /* Disable the Re-Tuning Request functionality */ in xenon_retune_setup()
[all …]
|
| D | sdhci-esdhc-imx.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
27 #include <linux/platform_data/mmc-esdhc-imx.h>
29 #include "sdhci-cqhci.h"
30 #include "sdhci-pltfm.h"
31 #include "sdhci-esdhc.h"
71 /* Tuning bits */
83 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
102 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
[all …]
|
| D | renesas_sdhi_core.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
30 #include <linux/mmc/slot-gpio.h>
35 #include <linux/pinctrl/pinctrl-state.h>
87 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable()
91 ret = clk_prepare_enable(priv->clk_cd); in renesas_sdhi_clk_enable()
[all …]
|
| D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
166 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
188 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
233 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
242 /* 4C-4F reserved for more max current */
249 /* 55-57 reserved */
254 /* 60-FB reserved */
262 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
[all …]
|
| D | sdhci-of-esdhc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
65 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
66 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
67 { .compatible = "fsl,ls1012a-esdhc", .data = &ls1012a_esdhc_clk},
68 { .compatible = "fsl,p1010-esdhc", .data = &p1010_esdhc_clk},
69 { .compatible = "fsl,mpc8379-esdhc" },
70 { .compatible = "fsl,mpc8536-esdhc" },
[all …]
|
| D | sdhci-xenon-phy.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
16 #include "sdhci-pltfm.h"
17 #include "sdhci-xenon.h"
194 /* Divider for calculating Tuning Step */
206 params = devm_kzalloc(mmc_dev(host->mmc), sizeof(*params), GFP_KERNEL); in xenon_alloc_emmc_phy()
208 return -ENOMEM; in xenon_alloc_emmc_phy()
210 priv->phy_params = params; in xenon_alloc_emmc_phy()
211 if (priv->phy_type == EMMC_5_0_PHY) in xenon_alloc_emmc_phy()
212 priv->emmc_phy_regs = &xenon_emmc_5_0_phy_regs; in xenon_alloc_emmc_phy()
[all …]
|
| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | sdhci-xenon.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
22 #include "sdhci-pltfm.h"
23 #include "sdhci-xenon.h"
42 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
43 return -ETIMEDOUT; in xenon_enable_internal_clk()
51 /* Set SDCLK-off-while-idle */
92 host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in xenon_enable_sdhc()
97 host->mmc->caps &= ~MMC_CAP_BUS_WIDTH_TEST; in xenon_enable_sdhc()
138 /* Disable the Re-Tuning Request functionality */ in xenon_retune_setup()
[all …]
|
| D | sdhci-esdhc-imx.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
70 /* Tuning bits */
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
106 /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
140 * open ended multi-blk IO. Otherwise the TC INT wouldn't
[all …]
|
| D | renesas_sdhi_core.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
28 #include <linux/mmc/slot-gpio.h>
31 #include <linux/pinctrl/pinctrl-state.h>
95 struct mmc_host *mmc = host->mmc; in renesas_sdhi_clk_enable()
99 ret = clk_prepare_enable(priv->clk_cd); in renesas_sdhi_clk_enable()
[all …]
|
| D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
103 * VDD2 - UHS2 or PCIe/NVMe
174 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
196 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
243 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
252 /* 4C-4F reserved for more max current */
259 /* 55-57 reserved */
264 /* 60-FB reserved */
[all …]
|
| D | sdhci-of-esdhc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
71 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
72 { .compatible = "fsl,ls1043a-esdhc", .data = &ls1043a_esdhc_clk},
73 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
74 { .compatible = "fsl,ls1012a-esdhc", .data = &ls1012a_esdhc_clk},
75 { .compatible = "fsl,p1010-esdhc", .data = &p1010_esdhc_clk},
76 { .compatible = "fsl,mpc8379-esdhc" },
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/sysctl/ |
| D | index.rst | 7 ------------------------------------------------------------------------------
18 be actually used, not just for the fun of programming it :-)
20 ------------------------------------------------------------------------------
37 you're the last RTFMing person to screw up.
39 In short, e-mail your suggestions, corrections and / or horror
44 --------------------------------------------------------------
50 at run-time, and the /proc/sys/ directory is there so that you
55 - a running Linux system
56 - root access
57 - common sense (this is especially hard to come by these days)
[all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/sysctl/ |
| D | index.rst | 7 ------------------------------------------------------------------------------
18 be actually used, not just for the fun of programming it :-)
20 ------------------------------------------------------------------------------
37 you're the last RTFMing person to screw up.
39 In short, e-mail your suggestions, corrections and / or horror
44 --------------------------------------------------------------
50 at run-time, and the /proc/sys/ directory is there so that you
55 - a running Linux system
56 - root access
57 - common sense (this is especially hard to come by these days)
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | marvell,xenon-sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/media/ |
| D | bt8xx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 -------------------
21 Please see :doc:`bttv-cardlist` for a complete list of Cards based on the
27 ./scripts/config -e PCI
28 ./scripts/config -e INPUT
29 ./scripts/config -m I2C
30 ./scripts/config -m MEDIA_SUPPORT
31 ./scripts/config -e MEDIA_PCI_SUPPORT
32 ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT
33 ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT
[all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/media/ |
| D | bt8xx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
16 -------------------
21 Please see Documentation/admin-guide/media/bttv-cardlist.rst for a complete
28 ./scripts/config -e PCI
29 ./scripts/config -e INPUT
30 ./scripts/config -m I2C
31 ./scripts/config -m MEDIA_SUPPORT
32 ./scripts/config -e MEDIA_PCI_SUPPORT
33 ./scripts/config -e MEDIA_ANALOG_TV_SUPPORT
34 ./scripts/config -e MEDIA_DIGITAL_TV_SUPPORT
[all …]
|
| /kernel/linux/linux-6.6/drivers/media/dvb-core/ |
| D | dvb_frontend.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dvb_frontend.c: DVB frontend tuning interface/thread
5 * Copyright (C) 1999-2001 Ralph Metzler
10 * Copyright (C) 2004 Andrew de Quincey (tuning thread cleanup)
57 MODULE_PARM_DESC(dvb_mfe_wait_time, "Wait up to <mfe_wait_time> seconds on open() for multi-fronten…
77 * FESTATE_IDLE. No tuning parameters have been supplied and the loop is idling.
79 * FESTATE_TUNING_FAST. Tuning parameters have been supplied and fast zigzag scan is in progress.
80 …* FESTATE_TUNING_SLOW. Tuning parameters have been supplied. Fast zigzag failed, so we're trying a…
83 …* FESTATE_ZIGZAG_SLOW. The lock has been lost. Fast zigzag has been failed, so we're trying again,…
85 * FESTATE_WAITFORLOCK. When we're waiting for a lock.
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/dvb-core/ |
| D | dvb_frontend.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dvb_frontend.c: DVB frontend tuning interface/thread
5 * Copyright (C) 1999-2001 Ralph Metzler
10 * Copyright (C) 2004 Andrew de Quincey (tuning thread cleanup)
56 MODULE_PARM_DESC(dvb_mfe_wait_time, "Wait up to <mfe_wait_time> seconds on open() for multi-fronten…
76 * FESTATE_IDLE. No tuning parameters have been supplied and the loop is idling.
78 * FESTATE_TUNING_FAST. Tuning parameters have been supplied and fast zigzag scan is in progress.
79 …* FESTATE_TUNING_SLOW. Tuning parameters have been supplied. Fast zigzag failed, so we're trying a…
82 …* FESTATE_ZIGZAG_SLOW. The lock has been lost. Fast zigzag has been failed, so we're trying again,…
84 * FESTATE_WAITFORLOCK. When we're waiting for a lock.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/driver-api/media/ |
| D | dtv-frontend.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 ------------------------
9 The Digital TV Frontend kABI defines a driver-internal interface for
10 registering low-level, hardware specific driver to a hardware independent
29 .name = "foo DVB-T/T2/C driver",
70 .name = "Bar DVB-S/S2 demodulator",
91 /* Satellite-specific */
100 #) For satellite digital TV standards (DVB-S, DVB-S2, ISDB-S), the
102 standards, they're specified in Hz. Due to that, if the same frontend
124 responsible for tuning the device. It supports multiple algorithms to
[all …]
|
| /kernel/linux/linux-6.6/Documentation/driver-api/media/ |
| D | dtv-frontend.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 ------------------------
9 The Digital TV Frontend kABI defines a driver-internal interface for
10 registering low-level, hardware specific driver to a hardware independent
29 .name = "foo DVB-T/T2/C driver",
70 .name = "Bar DVB-S/S2 demodulator",
91 /* Satellite-specific */
100 #) For satellite digital TV standards (DVB-S, DVB-S2, ISDB-S), the
102 standards, they're specified in Hz. Due to that, if the same frontend
124 responsible for tuning the device. It supports multiple algorithms to
[all …]
|
| /kernel/linux/linux-6.6/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
58 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
94 * for people to debug unstable mmc tuning results. in rockchip_mmc_set_phase()
98 return -EINVAL; in rockchip_mmc_set_phase()
106 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
119 * degrees off from what we think we're making. That's OK in rockchip_mmc_set_phase()
125 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
138 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase()
[all …]
|
| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #include <linux/clk-provider.h>
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
58 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
94 * for people to debug unstable mmc tuning results. in rockchip_mmc_set_phase()
98 return -EINVAL; in rockchip_mmc_set_phase()
106 * actually go non-monotonic. We don't go _too_ monotonic in rockchip_mmc_set_phase()
119 * degrees off from what we think we're making. That's OK in rockchip_mmc_set_phase()
125 * don't overflow 32-bit / 64-bit numbers. in rockchip_mmc_set_phase()
138 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), in rockchip_mmc_set_phase()
[all …]
|